- 14 Oct, 2021 10 commits
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Tomasz Wlostowski authored
softpll: prevent AUX clock FSM from getting stuck when the first locking attempt is unsuccessful. Also hack to fix the frequency/phase regulation mode threshold - to be exposed through api
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
boards/spec_silabs: use SoftPLL's new aux API to define the freqency ratio, also fup changes in the si57x driver
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
Notes: - no PPS divider phase alignment (yet) - works on the SPEC's Si570 @ 100 MHz (4/5 freq ratio) - very untested! consider it a proof of concept. - requires updated VHDL (see wr-cores with the same branch name)
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Tomasz Wlostowski authored
dev/endpoint: reduce PHY reset timeout (dangerous as triggers the HAL bug in the switch - I'm doing it only for development reasons)
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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- 11 Oct, 2021 1 commit
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Tomasz Wlostowski authored
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- 29 Jul, 2021 2 commits
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
dev/endpoint: hold the PHY in LONG reset during startup to ensure the WRS calclates the PHY bitstlide correctly. Temporary workaround for the bug in the WR Switch (wr-switch-sw#243).
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- 21 Jun, 2021 10 commits
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
- detailed Aux clock status - RX error count
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
dev: factor out WDIAGS code from SYSCON into a separate file. Implement accessor function for new diagnostic fields
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Tomasz Wlostowski authored
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- 18 Jun, 2021 1 commit
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Tomasz Wlostowski authored
softpll: rename the 'source tracking' mode to 'phase monitor', as it simply monitors the phases of the external (aux clocks) to the local WR clock
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- 11 May, 2021 1 commit
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Tomasz Wlostowski authored
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- 26 Apr, 2021 1 commit
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Juan David González Cobas authored
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- 16 Apr, 2021 11 commits
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Juan David González Cobas authored
This patchset removes the cli dependency on copy/pasted magic numbers coming from different .h files.
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Juan David González Cobas authored
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Juan David González Cobas authored
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Juan David González Cobas authored
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Juan David González Cobas authored
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Juan David González Cobas authored
We need the solibs ready before the ErtmTest class declaration (actually, before most struct declarations) to make available the magic constants from the libs without duplicated assignments
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Juan David González Cobas authored
In particular: aiming at using acc-py is not worth the ticket. The self-contained venv, based on system Python and a local copy of pyserial, builds less dependencies and nicely handles the dependency on pyserial. No need to add headaches to a simple test program.
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Juan David González Cobas authored
This disposes of the re-reading of cached values of latency, which is just another configuration paramenter
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Juan David González Cobas authored
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Juan David González Cobas authored
This reverts commit b8694a13.
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Juan David González Cobas authored
This reverts commit 1fcefe06.
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- 15 Apr, 2021 3 commits
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Juan David González Cobas authored
This implements the setting of streamers latencies. The API and semantics need to be clarified and the "experiment" of doing the read back of latencies directly from diag regs assessed or supressed.
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Juan David González Cobas authored
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Juan David González Cobas authored
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