Commit b8ee6bf6 authored by Alessandro Rubini's avatar Alessandro Rubini

Merge branch 'fez-cleanup-pll' (an older branch, now rebased)

parents d6b65580 16f7acd5
......@@ -426,7 +426,7 @@ void spll_set_phase_shift(int channel, int32_t value_picoseconds)
{
int i;
if (channel == SPLL_ALL_CHANNELS) {
spll_set_phase_shift(0, value_picoseconds);
set_phase_shift(0, value_picoseconds);
for (i = 0; i < spll_n_chan_out - 1; i++)
if (softpll.aux[i].seq_state == AUX_READY)
set_phase_shift(i + 1, value_picoseconds);
......@@ -599,21 +599,6 @@ int spll_get_aux_status(int channel)
return rval;
}
const char *spll_get_aux_status_string(int channel)
{
const char *aux_stat[] = {"disabled", "locking", "aligning", "locked"};
struct spll_aux_state *s = (struct spll_aux_state* )&softpll.aux[channel];
switch(s->seq_state)
{
case AUX_DISABLED: return aux_stat[0];
case AUX_LOCK_PLL: return aux_stat[1];
case AUX_ALIGN_PHASE: return aux_stat[2];
case AUX_READY: return aux_stat[3];
}
return "";
}
int spll_get_dac(int index)
{
if (index < 0)
......
......@@ -94,19 +94,6 @@ void spll_get_phase_shift(int out_channel, int32_t *current, int32_t *target);
/* Returns non-zero if the given output channel is busy phase shifting to a new preset */
int spll_shifter_busy(int out_channel);
/* Returns phase detector type used by particular output channel. There are two phase detectors available:
- DDMTD: locks only 62.5 / 125 MHz. Provides independent phase shift control for each output.
- Bang-Bang: locks to any frequency that is a result of rational (M/N) multiplication of the reference frequency.
The frequency can be set by spll_set_aux_frequency(). BB detector follows phase setpoint of channel 0 (WR reference),
there is no per-output shift control.
*/
int spll_get_phase_detector_type(int out_channel);
/* Sets the aux clock freuency when a BB detector is in use.
Must be called prior to spll_start_channel(). If the frequency is out of available range,
returns negative value */
int spll_set_aux_frequency(int out_channel, int32_t frequency);
/* Enables/disables phase tracking on channel (ref_channel). Phase is always measured between
the WR local reference (out_channel 0) and ref_channel */
void spll_enable_ptracker(int ref_channel, int enable);
......@@ -121,7 +108,6 @@ void spll_update(void);
/* Returns the status of given aux clock output (SPLL_AUX_) */
int spll_get_aux_status(int out_channel);
const char *spll_get_aux_status_string(int channel);
/* Debug/testing functions */
......
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