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Software for White Rabbit PTP Core
Commit a612ba01 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk
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ljd: apply LJD parameters dynamically for compatibility with regular ext

parent d18dde7b
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Showing with 36 additions and 9 deletions
dev/ad9516.c
View file @ a612ba01
......@@ -229,7 +229,7 @@ int ext_ad9516_locked (void)
return 0;
}
int ad9516_init(int scb_version)
int ad9516_init(int scb_version, int ljd_present)
{
pp_printf("Initializing AD9516 PLL...\n");
......@@ -259,7 +259,11 @@ int ad9516_init(int scb_version)
else //Old one
ad9516_load_regset(spi_base, ad9516_base_config_33, ARRAY_SIZE(ad9516_base_config_33), 0);
ad9516_load_regset(spi_base, ad9516_ref_tcxo, ARRAY_SIZE(ad9516_ref_tcxo), 1);
/* Set R divider value depending on Low-Jitter Daughterboard presence */
if (ljd_present)
ad9516_load_regset(spi_base, ad9516_ref_ljd, ARRAY_SIZE(ad9516_ref_tcxo), 1);
else
ad9516_load_regset(spi_base, ad9516_ref_tcxo, ARRAY_SIZE(ad9516_ref_tcxo), 1);
ad9516_wait_lock(spi_base);
ad9516_sync_outputs(spi_base);
......
dev/ad9516_config.h
View file @ a612ba01
......@@ -232,3 +232,9 @@ const struct ad9516_reg ad9516_ref_ext[] = {
{0x001C, 0x46} /* Use REF1 */
};
/* Config for Low-Jitter Daughterboard */
const struct ad9516_reg ad9516_ref_ljd[] = {
{0x0011, 0x04},
{0x0012, 0x00}, /* RDiv = 4 */
{0x001C, 0x06} /* Use REF1 */
};
include/wrc.h
View file @ a612ba01
......@@ -70,7 +70,7 @@ extern int abs(int val);
extern int wrc_ui_refperiod;
/* Init functions and defaults for the wrs build */
int ad9516_init(int scb_ver);
int ad9516_init(int scb_ver, int ljd_present);
void rts_init(void);
int rtipc_init(void);
void rts_update(void);
......
softpll/spll_external.c
View file @ a612ba01
......@@ -21,7 +21,9 @@
#define EXT_PERIOD_NS 100
#define EXT_FREQ_HZ 10000000
#define EXT_PPS_LATENCY_PS 63000 // fixme: make configurable
// fixme: make configurable
#define EXT_PPS_LATENCY_PS 30000 // for regular ext channel
#define EXT_PPS_LATENCY_LJD_PS 63000 // for low-jitter daughterboard
void external_init(volatile struct spll_external_state *s, int ext_ref,
......@@ -92,6 +94,14 @@ static int align_sample(int channel, int *v)
return 0; // sample not valid
}
static inline int get_pps_latency(int sel)
{
if (sel)
return EXT_PPS_LATENCY_LJD_PS;
else
return EXT_PPS_LATENCY_PS;
}
int external_align_fsm(volatile struct spll_external_state *s)
{
int v, done_sth = 0;
......@@ -189,8 +199,8 @@ int external_align_fsm(volatile struct spll_external_state *s)
s->align_shift += s->align_step;
mpll_set_phase_shift(s->main, s->align_shift);
} else if (v == s->align_target) {
s->align_shift += EXT_PPS_LATENCY_PS;
mpll_set_phase_shift(s->main, s->align_shift);
s->align_shift += get_pps_latency(ljd_present);
mpll_set_phase_shift(s->main, s->align_shift);
s->align_state = ALIGN_STATE_COMPENSATE_DELAY;
}
done_sth++;
......
softpll/spll_main.c
View file @ a612ba01
......@@ -22,6 +22,8 @@ extern void spll_log_dac(int y);
static inline void spll_log_dac(int y) {}
#endif
extern int ljd_present;
void mpll_init(struct spll_main_state *s, int id_ref,
int id_out)
{
......@@ -31,8 +33,13 @@ void mpll_init(struct spll_main_state *s, int id_ref,
s->pi.anti_windup = 1;
s->pi.bias = 30000;
#if defined(CONFIG_WR_SWITCH)
s->pi.kp = 1100; // / 2;
s->pi.ki = 30; // / 2;
if (ljd_present) {
s->pi.kp = 2000;
s->pi.ki = 15;
} else {
s->pi.kp = 1100; // / 2;
s->pi.ki = 30; // / 2;
}
#elif defined(CONFIG_WR_NODE)
s->pi.kp = -1100; // / 2;
s->pi.ki = -30; // / 2;
......
wrs_main.c
View file @ a612ba01
......@@ -55,7 +55,7 @@ int main(void)
/* for sure problem is in calling second time ad9516_init,
* but not only */
}
ad9516_init(scb_ver);
ad9516_init(scb_ver, ljd_present);
rts_init();
rtipc_init();
spll_very_init();
......
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