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Software for White Rabbit PTP Core
Commit 8cdc1250 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski
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boards/ertm14: new config headers for LTC6950 PLL

parent ec1d4983
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boards/ertm14/configs/ertm_15_ltc6950_config_rev1.h 0 → 100644
View file @ 8cdc1250
// this is the default bootstrap config for LTC6950:
// R divider = 1
// N divider = 100
// LV/CM output: bypass divider (forward whatever OCXO produces to the FPGA)
{
23,
{{0x00, 0x00},
{0x01, 0x00},
{0x02, 0x00},
{0x03, 0x08},
{0x04, 0x00},
{0x05, 0x0b}, // CP current = 11.2 mA
{0x06, 0x00},
{0x07, 0x00},
{0x08, 0x01},
{0x09, 0x00},
{0x0a, 0x64}, // N divider = 100 (VCO @ 1GHz, PFD @ 10 MHz)
{0x0b, 0x04}, // disable FILTR for 100 MHz
{0x0c, 0x00},
{0x0d, 0x81},
{0x0e, 0x00},
{0x0f, 0x84}, // 250 MHz
{0x10, 0x00},
{0x11, 0x80},
{0x12, 0x00},
{0x13, 0x80},
{0x14, 0x00},
{0x15, 0x81}, // RDIVOUT = 1 (drive LV/CM with R divider output)
{0x16, 0x00}}
};
boards/ertm14/configs/ertm_15_ltc6950_config_rev2.h 0 → 100644
View file @ 8cdc1250
// this is the default bootstrap config for LTC6950:
// R divider = 1
// N divider = 100
// LV/CM output: bypass divider (forward whatever OCXO produces to the FPGA)
{
23,
{{0x00, 0x00},
{0x01, 0x00},
{0x02, 0x00},
{0x03, 0x08},
{0x04, 0x00},
{0x05, 0x0b}, // CP current = 11.2 mA
{0x06, 0x00},
{0x07, 0x00},
{0x08, 0x01},
{0x09, 0x00},
{0x0a, 0x64}, // N divider = 100 (VCO @ 1GHz, PFD @ 10 MHz)
{0x0b, 0x04}, // disable FILTR for 100 MHz
{0x0c, 0x00},
{0x0d, 0x81}, // PECL0: 1 GHz
{0x0e, 0x00},
{0x0f, 0x84}, // PECL1: 250 MHz
{0x10, 0x00},
{0x11, 0x80 | 0x10}, // PECL2: 62.5 MHz
{0x12, 0x00},
{0x13, 0x81}, // PECL3: 1 GHz
{0x14, 0x00},
{0x15, 0x81}, // LV-CM: unused
{0x16, 0x00}}
};
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