Commit 7a298d7b authored by Tristan Gingold's avatar Tristan Gingold

boards: cleanup (remove unused defines)

parent f81fc5cf
Pipeline #4511 passed with stage
in 3 minutes and 30 seconds
......@@ -72,9 +72,6 @@
/* Socket buffer size, determines the max. RX packet size */
#define NET_MAX_SKBUF_SIZE 512
/* Number of auxillary clock channels - usually equal to the number of FMCs */
#define NUM_AUX_CLOCKS 1
/* spll parameter that are board-specific */
#define BOARD_DIVIDE_DMTD_CLOCKS 0
#define BOARD_MAX_CHAN_REF 1
......@@ -91,8 +88,6 @@
#define SDB_ADDRESS 0x30000
#define FMC_EEPROM_ADR 0x50
#define SDBFS_REC 5
#endif /* __BOARD_WRC_H */
......@@ -63,9 +63,6 @@
/* Socket buffer size, determines the max. RX packet size */
#define NET_MAX_SKBUF_SIZE 512
/* Number of auxillary clock channels - usually equal to the number of FMCs */
#define NUM_AUX_CLOCKS 1
/* spll parameter that are board-specific */
# define BOARD_DIVIDE_DMTD_CLOCKS 0
# define NS_PER_CLOCK 16
......@@ -76,8 +73,6 @@
#define ERTM14_MAX_CONFIGS 8
#define FMC_EEPROM_ADR 0x50
#define SDBFS_REC 5
#define BASE_ERTM_CLOCK_MONITOR (BASE_AUXWB + 0x100)
......
......@@ -36,9 +36,6 @@
/* Socket buffer size, determines the max. RX packet size */
#define NET_MAX_SKBUF_SIZE 512
/* Number of auxillary clock channels - usually equal to the number of FMCs */
#define NUM_AUX_CLOCKS 1
/* spll parameter that are board-specific */
#ifdef CONFIG_TARGET_GENERIC_PHY_16BIT
# define BOARD_DIVIDE_DMTD_CLOCKS 0
......
......@@ -30,9 +30,6 @@
/* Socket buffer size, determines the max. RX packet size */
#define NET_MAX_SKBUF_SIZE 512
/* Number of auxillary clock channels - usually equal to the number of FMCs */
#define NUM_AUX_CLOCKS 1
/* spll parameter that are board-specific */
#define BOARD_DIVIDE_DMTD_CLOCKS 0
#define BOARD_MAX_CHAN_REF 1
......@@ -45,6 +42,7 @@
#define CONSOLE_UART_BAUDRATE 115200
/* i2c eeproms address */
#define CFG_EEPROM_ADR 0x50
#define MAC_CHIP_ADR 0x51
......
......@@ -36,9 +36,6 @@
/* Socket buffer size, determines the max. RX packet size */
#define NET_MAX_SKBUF_SIZE 512
/* Number of auxillary clock channels - usually equal to the number of FMCs */
#define NUM_AUX_CLOCKS 1
/* spll parameter that are board-specific */
#define BOARD_DIVIDE_DMTD_CLOCKS 0
......@@ -54,8 +51,6 @@
#define CONSOLE_UART_BAUDRATE 115200
#define FMC_EEPROM_ADR 0x50
#define SDBFS_REC 6
void sdb_find_devices(void);
......
......@@ -35,9 +35,6 @@
/* Socket buffer size, determines the max. RX packet size */
#define NET_MAX_SKBUF_SIZE 512
/* Number of auxillary clock channels - usually equal to the number of FMCs */
#define NUM_AUX_CLOCKS 1
/* spll parameter that are board-specific */
# define BOARD_DIVIDE_DMTD_CLOCKS 0
# define NS_PER_CLOCK 16
......@@ -50,8 +47,6 @@
#define SDB_ADDRESS 0x50000
#define FMC_EEPROM_ADR 0x50
#define SDBFS_REC 5
#endif /* __BOARD_CONFIG_WR2RF_VME_H */
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