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Software for White Rabbit PTP Core
Commits
6c66cf95
Commit
6c66cf95
authored
Sep 12, 2011
by
Grzegorz Daniluk
Browse files
Options
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Plain Diff
Merge branch 'tom_mods'
Conflicts: wrc_main.c
parents
985c699d
b4c85881
Expand all
Hide whitespace changes
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Side-by-side
Showing
12 changed files
with
511 additions
and
226 deletions
+511
-226
Makefile
Makefile
+3
-3
endpoint.c
dev/endpoint.c
+1
-1
minic.c
dev/minic.c
+18
-17
softpll.c
dev/softpll.c
+14
-6
uart.c
dev/uart.c
+10
-0
board.h
include/board.h
+2
-2
trace.h
include/trace.h
+3
-1
monitor.c
monitor/monitor.c
+16
-8
crt0.S
target/lm32/crt0.S
+254
-138
Makefile
tools/Makefile
+4
-4
lm32-loader.c
tools/lm32-loader.c
+48
-2
wrc_main.c
wrc_main.c
+138
-44
No files found.
Makefile
View file @
6c66cf95
...
...
@@ -7,7 +7,7 @@ PTPD_CFLAGS = -ffreestanding -DPTPD_FREESTANDING -DWRPC_EXTRA_SLIM -DPTPD_MSBF
PTPD_CFLAGS
+=
-Wall
-ggdb
-I
$D
/wrsw_hal
\
-I
$D
/libptpnetif
-I
$D
/PTPWRd
\
-include
$D
/compat.h
-include
$D
/PTPWRd/dep/trace.h
-include
$D
/libposix/ptpd-wrappers.h
PTPD_CFLAGS
+=
-DPTPD_NO_DAEMON
-DNEW_SINGLE_WRFSM
-DPTPD_TRACE_MASK
=
0x2804
PTPD_CFLAGS
+=
-DPTPD_NO_DAEMON
-DNEW_SINGLE_WRFSM
-DPTPD_TRACE_MASK
=
TRACE_SERVO
OBJS_PTPD
=
$D
/PTPWRd/arith.o
OBJS_PTPD
+=
$D
/PTPWRd/bmc.o
...
...
@@ -56,7 +56,7 @@ all: $(OBJS)
$(SIZE)
-t
$(OBJS)
${
CC
}
-o
$(OUTPUT)
.elf
$(OBJS)
$(LDFLAGS)
${
OBJCOPY
}
-O
binary
$(OUTPUT)
.elf
$(OUTPUT)
.bin
#
${OBJDUMP} -d $(OUTPUT).elf > $(OUTPUT)_disasm.S
${
OBJDUMP
}
-d
$(OUTPUT)
.elf
>
$(OUTPUT)
_disasm.S
./tools/genraminit
$(OUTPUT)
.bin 0
>
$(OUTPUT)
.ram
clean
:
...
...
@@ -66,7 +66,7 @@ clean:
${
CC
}
$(CFLAGS)
$(PTPD_CFLAGS)
$(INCLUDE_DIR)
$(LIB_DIR)
-c
$^
-o
$@
load
:
all
./tools/
zpu
-loader
$(OUTPUT)
.bin
./tools/
lm32
-loader
$(OUTPUT)
.bin
tools
:
make
-C
tools
...
...
dev/endpoint.c
View file @
6c66cf95
...
...
@@ -116,7 +116,7 @@ int ep_get_deltas(uint32_t *delta_tx, uint32_t *delta_rx)
{
// mprintf("called ep_get_deltas()\n");
*
delta_tx
=
0
;
*
delta_rx
=
15000
-
7000
+
195000
+
32000
+
UIS_PER_SERIAL_BIT
*
MDIO_WR_SPEC_BSLIDE_R
(
pcs_read
(
MDIO_REG_WR_SPEC
))
+
2800
;
*
delta_rx
=
15000
-
7000
+
195000
+
32000
+
UIS_PER_SERIAL_BIT
*
MDIO_WR_SPEC_BSLIDE_R
(
pcs_read
(
MDIO_REG_WR_SPEC
))
+
2800
-
9000
;
}
void
ep_show_counters
()
...
...
dev/minic.c
View file @
6c66cf95
...
...
@@ -49,6 +49,8 @@ struct wr_minic {
int
synced
;
int
syncing_counters
;
int
iface_up
;
int
tx_count
,
rx_count
;
uint32_t
cur_rx_desc
;
};
...
...
@@ -92,12 +94,15 @@ void minic_init()
{
minic_writel
(
MINIC_REG_EIC_IDR
,
MINIC_EIC_IDR_RX
);
minic_writel
(
MINIC_REG_EIC_ISR
,
MINIC_EIC_ISR_RX
);
minic
.
rx_base
=
dma_rx_buf
;
minic
.
rx_size
=
sizeof
(
dma_rx_buf
);
minic
.
rx_base
=
dma_rx_buf
;
minic
.
rx_size
=
sizeof
(
dma_rx_buf
);
minic
.
tx_base
=
dma_tx_buf
;
minic
.
tx_size
=
sizeof
(
dma_tx_buf
);
minic
.
tx_count
=
0
;
minic
.
rx_count
=
0
;
minic_new_rx_buffer
();
minic_writel
(
MINIC_REG_EIC_IER
,
MINIC_EIC_IER_RX
);
...
...
@@ -178,25 +183,14 @@ int minic_rx_frame(uint8_t *hdr, uint8_t *payload, uint32_t buf_size, struct hw_
hwts
->
nsec
=
counter_r
*
8
;
// TRACE_DEV("TS minic_rx_frame: %d.%d\n", hwts->utc, hwts->nsec);
}
n_recvd
=
(
buf_size
<
payload_size
?
buf_size
:
payload_size
);
/* FIXME: VLAN support */
TRACE_DEV
(
"minic_rx_frame [%d bytes] TS: %d.%d
\n
"
,
n_recvd
,
hwts
->
utc
,
hwts
->
nsec
);
minic
.
rx_count
++
;
memcpy
(
hdr
,
(
void
*
)
minic
.
rx_head
+
4
,
ETH_HEADER_SIZE
);
//TRACE_DEV("%s: packet: ", __FUNCTION__);
//for(i=0; i<ETH_HEADER_SIZE; i++) TRACE_DEV("%x ", *(hdr+i));
memcpy
(
payload
,
(
void
*
)
minic
.
rx_head
+
4
+
ETH_HEADER_SIZE
,
n_recvd
-
ETH_HEADER_SIZE
);
//for(i=0; i<n_recvd-ETH_HEADER_SIZE; i++) TRACE_DEV("%x ", *(payload+i));
/* for(i=0;i<n_recvd-14;i++)
TRACE_DEV("%x ", payload[i]);
TRACE_DEV("---\n");
*/
// TRACE_DEV("nwords_avant: %d\n", num_words);
minic
.
rx_head
+=
num_words
;
}
else
{
// RX_DESC_ERROR
...
...
@@ -230,7 +224,7 @@ int minic_tx_frame(uint8_t *hdr, uint8_t *payload, uint32_t size, struct hw_time
minic_new_tx_buffer
();
TRACE_DEV
(
"minic_tx_frame: head %x size %d
\n
"
,
minic
.
tx_head
,
size
);
memset
(
minic
.
tx_head
,
0x0
,
size
+
16
);
memset
((
void
*
)
minic
.
tx_head
+
4
,
0
,
size
<
60
?
60
:
size
);
memcpy
((
void
*
)
minic
.
tx_head
+
4
,
hdr
,
ETH_HEADER_SIZE
);
...
...
@@ -293,7 +287,8 @@ int minic_tx_frame(uint8_t *hdr, uint8_t *payload, uint32_t size, struct hw_time
hwts
->
ahead
=
0
;
hwts
->
nsec
=
counter_r
*
8
;
// TRACE_DEV("TS minic_tx_frame: %d.%d\n", hwts->utc, hwts->nsec);
TRACE_DEV
(
"minic_tx_frame [%d bytes] TS: %d.%d
\n
"
,
size
,
hwts
->
utc
,
hwts
->
nsec
);
minic
.
tx_count
++
;
}
...
...
@@ -301,3 +296,9 @@ int minic_tx_frame(uint8_t *hdr, uint8_t *payload, uint32_t size, struct hw_time
return
size
;
}
void
minic_get_stats
(
int
*
tx_frames
,
int
*
rx_frames
)
{
*
tx_frames
=
minic
.
tx_count
;
*
rx_frames
=
minic
.
rx_count
;
}
\ No newline at end of file
dev/softpll.c
View file @
6c66cf95
...
...
@@ -3,7 +3,9 @@
#include <hw/softpll_regs.h>
#define TAG_BITS 17
#include "gpio.h"
#define TAG_BITS 20
#define HPLL_N 14
...
...
@@ -119,6 +121,8 @@ int eee, dve;
static
volatile
struct
softpll_state
pstate
;
volatile
int
irq_cnt
=
0
;
volatile
int
sp_limit
=
0xffff
;
void
_irq_entry
()
{
int
dv
;
...
...
@@ -126,7 +130,11 @@ void _irq_entry()
int
tag_fb_ready
=
0
;
int
tag_ref
;
int
tag_fb
;
// int sp = _get_sp();
irq_cnt
++
;
gpio_out
(
GPIO_PIN_LED_STATUS
,
1
);
if
(
SPLL
->
CSR
&
READY_REF
)
{
tag_ref
=
SPLL
->
TAG_REF
;
...
...
@@ -336,6 +344,8 @@ void _irq_entry()
pstate
.
d_locked
=
1
;
}
gpio_out
(
GPIO_PIN_LED_STATUS
,
0
);
clear_irq
();
}
...
...
@@ -361,7 +371,6 @@ void softpll_enable()
SPLL
->
CSR
=
SPLL_CSR_TAG_EN_W
(
CHAN_PERIOD
);
// | SPLL_CSR_TAG_EN_W(CHAN_REF);
;
SPLL
->
EIC_IER
=
1
;
enable_irq
();
...
...
@@ -374,10 +383,9 @@ void softpll_enable()
int
softpll_check_lock
()
{
/* TRACE_DEV("LCK h:f%d l%d d: f%d l%d err %d %d dac %d\n",
pstate.h_freq_mode ,pstate.h_locked,
pstate.d_freq_mode, pstate.d_locked,
pstate.h_tag, pstate.h_tag & 0x3fff, pstate.h_dac_val);*/
TRACE_DEV
(
"[softpll] Helper: lock %d freqmode %d, Main: lock %d freqmode %d
\n
"
,
pstate
.
h_locked
,
pstate
.
h_freq_mode
,
pstate
.
d_locked
,
pstate
.
d_freq_mode
);
int
lck
=
pstate
.
h_locked
&&
pstate
.
d_locked
;
...
...
dev/uart.c
View file @
6c66cf95
...
...
@@ -30,3 +30,13 @@ void uart_write_string(char *s)
while
(
*
s
)
uart_write_byte
(
*
(
s
++
));
}
int
uart_poll
()
{
return
uart
->
SR
&
UART_SR_RX_RDY
;
}
int
uart_read_byte
()
{
return
uart
->
RDR
&
0xff
;
}
\ No newline at end of file
include/board.h
View file @
6c66cf95
...
...
@@ -13,8 +13,8 @@
#define UART_BAUDRATE 115200ULL
/* not a real UART */
#define GPIO_PIN_LED
1
0
#define GPIO_PIN_LED
2
1
#define GPIO_PIN_LED
_LINK
0
#define GPIO_PIN_LED
_STATUS
1
#define GPIO_PIN_SCL_OUT 2
#define GPIO_PIN_SDA_OUT 3
#define GPIO_PIN_SDA_IN 4
...
...
include/trace.h
View file @
6c66cf95
#ifndef __FREESTANDING_TRACE_H__
#define __FREESTANDING_TRACE_H__
extern
int
wrc_extra_debug
;
#define TRACE_WRAP(...)
#define TRACE_DEV(...)
mprintf(
__VA_ARGS__)
#define TRACE_DEV(...)
if(wrc_extra_debug) wrc_debug_printf(0,
__VA_ARGS__)
#endif
monitor/monitor.c
View file @
6c66cf95
...
...
@@ -3,7 +3,7 @@
#include "hal_exports.h"
extern
ptpdexp_sync_state_t
cur_servo_state
;
extern
int
wrc_man_phase
;
#define C_DIM 0x80
#define C_WHITE 7
...
...
@@ -20,11 +20,13 @@ int64_t abs64(int64_t t)
int
wr_mon_debug
(
void
)
int
wrc_mon_gui
(
void
)
{
static
char
*
slave_states
[]
=
{
"Uninitialized"
,
"SYNC_UTC"
,
"SYNC_NSEC"
,
"SYNC_PHASE"
,
"TRACK_PHASE"
};
static
uint32_t
last
=
0
;
hexp_port_state_t
ps
;
int
tx
,
rx
;
if
(
timer_get_tics
()
-
last
<
1000
)
return
0
;
...
...
@@ -33,18 +35,20 @@ int wr_mon_debug(void)
m_term_clear
();
m_pcprintf
(
1
,
1
,
C_BLUE
,
"WR PTP Core Sync Monitor v 0.1 **** pre-alpha version ****"
);
m_pcprintf
(
1
,
1
,
C_BLUE
,
"WR PTP Core Sync Monitor v 0.2"
);
m_pcprintf
(
2
,
1
,
C_GREY
,
"g = exit, t = enable/disable phase tracking, +/- = increase/decrease phase by 100ps"
);
/*show_ports*/
halexp_get_port_state
(
&
ps
,
NULL
);
m_pcprintf
(
3
,
1
,
C_BLUE
,
"Link status:"
);
m_pcprintf
(
4
,
1
,
C_BLUE
,
"Link status:"
);
m_pcprintf
(
5
,
1
,
C_WHITE
,
"%s: "
,
"wru1"
);
if
(
ps
.
up
)
m_cprintf
(
C_GREEN
,
"Link up
"
);
else
m_cprintf
(
C_RED
,
"Link down
"
);
m_pcprintf
(
6
,
1
,
C_WHITE
,
"%s: "
,
"wru1"
);
if
(
ps
.
up
)
m_cprintf
(
C_GREEN
,
"Link up
"
);
else
m_cprintf
(
C_RED
,
"Link down
"
);
if
(
ps
.
up
)
{
m_cprintf
(
C_GREY
,
"mode: "
);
minic_get_stats
(
&
tx
,
&
rx
);
m_cprintf
(
C_GREY
,
"(RX: %d, TX: %d), mode: "
,
rx
,
tx
);
switch
(
ps
.
mode
)
{
...
...
@@ -79,8 +83,12 @@ int wr_mon_debug(void)
m_cprintf
(
C_GREY
,
"Clock offset: "
);
m_cprintf
(
C_WHITE
,
"%d ps
\n
"
,
(
int32_t
)(
cur_servo_state
.
cur_offset
));
m_cprintf
(
C_GREY
,
"Phase setpoint: "
);
m_cprintf
(
C_WHITE
,
"%d ps
\n
"
,
(
int32_t
)(
cur_servo_state
.
cur_setpoint
));
m_cprintf
(
C_GREY
,
"Skew: "
);
m_cprintf
(
C_WHITE
,
"%d ps
\n
"
,
(
int32_t
)(
cur_servo_state
.
cur_skew
));
}
m_cprintf
(
C_GREY
,
"Manual phase adjustment: "
);
m_cprintf
(
C_WHITE
,
"%d ps
\n
"
,
(
int32_t
)(
wrc_man_phase
));
}
m_cprintf
(
C_GREY
,
"--"
);
return
0
;
}
target/lm32/crt0.S
100644 → 100755
View file @
6c66cf95
This diff is collapsed.
Click to expand it.
tools/Makefile
View file @
6c66cf95
...
...
@@ -10,12 +10,12 @@ STRIP = $(CROSS_COMPILE)strip
OBJCOPY
=
$(CROSS_COMPILE)
objcopy
OBJDUMP
=
$(CROSS_COMPILE)
objdump
all
:
zpu
-loader genraminit vuart_console
all
:
lm32
-loader genraminit vuart_console
OBJS_LOADER
=
zpu
-loader.o rr_io.o
OBJS_LOADER
=
lm32
-loader.o rr_io.o
zpu
-loader
:
$(OBJS_LOADER)
${
CC
}
-o
zpu
-loader
$(OBJS_LOADER)
lm32
-loader
:
$(OBJS_LOADER)
${
CC
}
-o
lm32
-loader
$(OBJS_LOADER)
genraminit
:
genraminit.o
${
CC
}
-o
genraminit genraminit.o
...
...
tools/
zpu
-loader.c
→
tools/
lm32
-loader.c
View file @
6c66cf95
...
...
@@ -35,21 +35,29 @@ int rst_zpu(int spec, int rst);
int
copy
(
int
spec
,
int
srcbin
,
unsigned
int
baseaddr
);
int
verify
(
int
spec
,
int
srcbin
,
unsigned
int
baseaddr
);
int
conv_endian
(
int
x
);
int
dump_to_file
(
int
spec
,
char
*
filename
,
unsigned
int
baseaddr
);
int
main
(
int
argc
,
char
**
argv
)
{
unsigned
int
addr
=
0x80000
;
int
spec
,
srcbin
;
unsigned
int
bytes
;
char
*
dumpfile
=
NULL
;
if
(
argc
<
2
)
{
fprintf
(
stderr
,
"No parameters specified !
\n
"
);
fprintf
(
stderr
,
"Usage:
\n\t
./loadsw <binary file> [base address]
\n
"
);
fprintf
(
stderr
,
"Usage:
\n\t
./%s [-r] <binary file> [base address]
\n
"
,
argv
[
0
]);
fprintf
(
stderr
,
"-r options dumps the memory contents to a given file.
\n\n
"
);
return
-
1
;
}
if
(
argc
==
3
)
if
(
!
strcmp
(
argv
[
1
],
"-r"
))
dumpfile
=
argv
[
2
];
else
if
(
argc
==
3
)
addr
=
atoi
(
argv
[
2
]);
spec
=
open
(
DEVNAME
,
O_RDWR
);
if
(
spec
<
0
)
...
...
@@ -58,6 +66,12 @@ int main(int argc, char **argv)
return
-
1
;
}
if
(
dumpfile
)
{
dump_to_file
(
spec
,
dumpfile
,
addr
);
return
0
;
}
srcbin
=
open
(
argv
[
1
],
O_RDONLY
);
if
(
srcbin
<
0
)
{
...
...
@@ -124,6 +138,38 @@ int copy(int spec, int srcbin, unsigned int baseaddr)
return
bytes
;
}
int
dump_to_file
(
int
spec
,
char
*
filename
,
unsigned
int
baseaddr
)
{
unsigned
int
bytes
,
word
;
struct
rr_iocmd
iocmd
;
int
ret
;
FILE
*
f
=
fopen
(
filename
,
"wb"
);
if
(
!
f
)
return
-
1
;
bytes
=
0
;
while
(
bytes
<
0x10000
)
{
iocmd
.
address
=
baseaddr
+
bytes
;
// bytes += ret; //address shift for next write
iocmd
.
address
|=
__RR_SET_BAR
(
0
);
//bar0
iocmd
.
datasize
=
4
;
iocmd
.
data32
=
0
;
ret
=
ioctl
(
spec
,
RR_READ
,
&
iocmd
);
word
=
conv_endian
(
iocmd
.
data32
);
fwrite
(
&
word
,
4
,
1
,
f
);
bytes
+=
4
;
}
fclose
(
f
);
}
int
verify
(
int
spec
,
int
srcbin
,
unsigned
int
baseaddr
)
{
unsigned
int
wbin
;
...
...
wrc_main.c
View file @
6c66cf95
#include <stdio.h>
#include <inttypes.h>
#include <stdarg.h>
#include "gpio.h"
#include "uart.h"
#include "endpoint.h"
...
...
@@ -81,7 +83,7 @@ void silly_minic_test()
memset
(
buf_hdr
+
6
,
0
,
6
);
buf_hdr
[
12
]
=
0xc0
;
buf_hdr
[
13
]
=
0xef
;
minic_tx_frame
(
buf_hdr
,
buf
,
64
,
buf
);
mprintf
(
"Send
\n
"
);
timer_delay
(
1000
);
...
...
@@ -94,14 +96,14 @@ void test_transition()
{
int
phase
=
0
;
softpll_enable
();
while
(
!
softpll_check_lock
())
timer_delay
(
1000
);
for
(;;)
{
struct
hw_timestamp
hwts
;
uint8_t
buf_hdr
[
18
],
buf
[
128
];
if
(
minic_rx_frame
(
buf_hdr
,
buf
,
128
,
&
hwts
)
>
0
)
{
printf
(
"phase %d ahead %d
\n
"
,
phase
,
hwts
.
ahead
);
...
...
@@ -125,71 +127,163 @@ int button_pressed()
int
enable_tracking
=
1
;
int
main
(
void
)
void
wrc_initialize
(
)
{
int
rx
,
tx
;
int
link_went_up
,
link_went_down
;
int
prev_link_state
=
0
,
link_state
;
int16_t
ret
;
int
ret
;
uart_init
();
uart_write_string
(
__FILE__
" is up (compiled on "
__DATE__
" "
__TIME__
")
\n
"
);
mprintf
(
"wr_core: starting up (press G to launch the GUI and D for extra debug messages)....
\n
"
);
ep_init
(
mac_addr
);
ep_enable
(
1
,
1
);
minic_init
();
pps_gen_init
();
netStartup
();
// mi2c_init(
);
// mi2c_scan(
);
gpio_dir
(
GPIO_PIN_BTN1
,
0
);
gpio_dir
(
GPIO_PIN_BTN1
,
0
);
gpio_dir
(
GPIO_PIN_LED_LINK
,
1
);
gpio_out
(
GPIO_PIN_LED_LINK
,
0
);
gpio_dir
(
GPIO_PIN_LED_STATUS
,
1
);
// softpll_enable();
// for(;;) softpll_check_lock();
wr_servo_man_adjust_phase
(
-
11600
+
1700
);
wr_servo_man_adjust_phase
(
-
11600
+
1700
);
displayConfigINFO
(
&
rtOpts
);
displayConfigINFO
(
&
rtOpts
);
ptpPortDS
=
ptpdStartup
(
0
,
NULL
,
&
ret
,
&
rtOpts
,
&
ptpClockDS
);
initDataClock
(
&
rtOpts
,
&
ptpClockDS
);
}
for
(;;)
#define LINK_UP 1
#define LINK_DOWN 2
int
wrc_check_link
()
{
static
int
prev_link_state
=
-
1
;
int
link_state
=
ep_link_up
();
int
rv
=
0
;
if
(
!
prev_link_state
&&
link_state
)
{
link_state
=
ep_link_up
();
TRACE_DEV
(
"Link up.
\n
"
);
gpio_out
(
GPIO_PIN_LED_LINK
,
1
);
rv
=
LINK_UP
;
}
else
if
(
prev_link_state
&&
!
link_state
)
{
TRACE_DEV
(
"Link down.
\n
"
);
gpio_out
(
GPIO_PIN_LED_LINK
,
0
);
rv
=
LINK_DOWN
;
}
prev_link_state
=
link_state
;
return
rv
;
}
link_went_up
=
!
prev_link_state
&&
link_state
;
prev_link_state
=
link_state
;
int
wrc_extra_debug
=
0
;
int
wrc_gui_mode
=
0
;
if
(
link_went_up
)
void
wrc_debug_printf
(
int
subsys
,
const
char
*
fmt
,
...)
{
va_list
ap
;
if
(
wrc_gui_mode
)
return
;
va_start
(
ap
,
fmt
);
if
(
wrc_extra_debug
||
(
!
wrc_extra_debug
&&
(
subsys
&
TRACE_SERVO
)))
vprintf
(
fmt
,
ap
);
va_end
(
ap
);
}
static
int
wrc_enable_tracking
=
1
;
int
wrc_man_phase
=
0
;
void
wrc_handle_input
()
{
if
(
uart_poll
())
{
int
x
=
uart_read_byte
();
switch
(
x
)
{
case
'g'
:
wrc_gui_mode
=
1
-
wrc_gui_mode
;
if
(
!
wrc_gui_mode
)
{
m_term_clear
();
wrc_debug_printf
(
0
,
"Exiting GUI mode
\n
"
);
}
break
;
case
'd'
:
wrc_extra_debug
=
1
-
wrc_extra_debug
;
wrc_debug_printf
(
0
,
"Verbose debug %s.
\n
"
,
wrc_extra_debug
?
"enabled"
:
"disabled"
);
break
;
case
't'
:
wrc_enable_tracking
=
1
-
wrc_enable_tracking
;
wr_servo_enable_tracking
(
wrc_enable_tracking
);
wrc_debug_printf
(
0
,
"Phase tracking %s.
\n
"
,
wrc_enable_tracking
?
"enabled"
:
"disabled"
);
break
;
case
'+'
:
case
'-'
:
wrc_man_phase
+=
(
x
==
'+'
?
100
:
-
100
);
wrc_debug_printf
(
0
,
"Manual phase adjust: %d
\n
"
,
wrc_man_phase
);
wr_servo_man_adjust_phase
(
wrc_man_phase
);
break
;
}
}
}
int
dupa
(
int
a
)
{
return
a
;
}
extern
volatile
int
irq_cnt
;
int
main
(
void
)
{
int
rx
,
tx
;
int
link_went_up
,
link_went_down
;
int
prev_link_state
=
0
,
link_state
;
int16_t
ret
;
wrc_initialize
();
softpll_enable
();
for
(;;)
{
wrc_check_link
();
wrc_handle_input
();
if
(
wrc_gui_mode
)
wrc_mon_gui
();
// printf("irq_cnt %d sp %x\n", dupa(irq_cnt), _get_sp());
/* if(button_pressed())
{
uint32_t
dtxm
,
drxm
;
TRACE_DEV
(
"LINK UP
\n
"
);
// toState(PTP_INITIALIZING, &rtOpts, ptpPortDS);
}
//wr_mon_debug();
if
(
button_pressed
())
{
enable_tracking
=
1
-
enable_tracking
;
wr_servo_enable_tracking
(
enable_tracking
);
}
//mprintf("before state=%d, wrState=%d\n", ptpPortDS->portState, ptpPortDS->wrPortState);
protocol_nonblock
(
&
rtOpts
,
ptpPortDS
);
//mprintf("after state=%d, wrState=%d\n", ptpPortDS->portState, ptpPortDS->wrPortState);
update_rx_queues
();
timer_delay
(
10
);
}
enable_tracking = 1-enable_tracking;
wr_servo_enable_tracking(enable_tracking);
}
*/
protocol_nonblock
(
&
rtOpts
,
ptpPortDS
);
update_rx_queues
();
// softpll_check_lock();
timer_delay
(
10
);
}
}
...
...
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