Commit 56a295f8 authored by li hongming's avatar li hongming

reset the endpoint/minic when the port reconnects.

parent ed1e0725
......@@ -223,6 +223,14 @@ static int calib_t24p_master(uint32_t *value, int port)
return rv;
}
pp_printf("port %d t24p read from storage: %d ps\n", port,*value);
if ((*value)>100000)
{
pp_printf("Port %d Measuring t2/t4 phase transition...\n", port);
measure_t24p(value, port);
rv=storage_phtrans(value, 1, port);
pp_printf("Wrote new t24p value: %d ps (%s)\n", *value,
rv < 0 ? "Failed" : "Success");
}
return rv;
}
......
......@@ -136,6 +136,14 @@ void net_rst(void)
syscon->GPSR |= SYSC_GPSR_NET_RST;
}
void minic_rst(int port)
{
if (port==0)
syscon->GPSR |= SYSC_GPSR_MINIC_RST;
else
syscon->GPSR |= SYSC_GPSR_MINIC_DP_RST;
}
int wdiag_set_valid(int enable)
{
if (enable)
......
......@@ -3,7 +3,7 @@
* File : wrc_syscon_regs.h
* Author : auto-generated by wbgen2 from wrc_syscon_wb.wb
* Created : Tue Oct 2 10:46:20 2018
* Created : Thu Nov 22 14:21:08 2018
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wrc_syscon_wb.wb
......@@ -105,6 +105,12 @@
/* definitions for field: DP SFP I2C bitbanged SDA in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_DP_SFP_SDA WBGEN2_GEN_MASK(18, 1)
/* definitions for field: Minic reset in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_MINIC_RST WBGEN2_GEN_MASK(19, 1)
/* definitions for field: Minic DP reset in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_MINIC_DP_RST WBGEN2_GEN_MASK(20, 1)
/* definitions for register: GPIO Clear Register */
/* definitions for field: Status LED in reg: GPIO Clear Register */
......
......@@ -144,6 +144,7 @@ int diag_read_word(uint32_t adr, int bank, uint32_t *val);
int diag_write_word(uint32_t adr, uint32_t val);
void net_rst(void);
void minic_rst(int port);
int wdiag_set_valid(int enable);
int wdiag_get_valid(void);
......
......@@ -102,6 +102,7 @@ static void wrc_initialize(void)
//Duplicate the configuration for both ports.
for (port=0; port<wr_num_ports;port++)
{
minic_rst(port);
pp_printf("PORT %d Local MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n", port,
mac_addr[port][0], mac_addr[port][1], mac_addr[port][2], mac_addr[port][3],
......@@ -118,8 +119,7 @@ static void wrc_initialize(void)
wrc_ptp_init();
/* try reading t24 phase transition from EEPROM */
for (port=0; port<wr_num_ports;port++){
cal_phase_transition[port] = 2389; // default
calib_t24p(WRC_MODE_MASTER, &cal_phase_transition[port],port);
cal_phase_transition[port] = 5800; // default
}
spll_very_init();
......@@ -153,7 +153,6 @@ static int wrc_check_link(void)
{
static int prev_state[wr_num_ports];
static uint8_t first_run=0;
uint8_t mac_addr[wr_num_ports][6];
int state[wr_num_ports];
int rv = 0;
int port;
......@@ -173,6 +172,7 @@ static int wrc_check_link(void)
if (port==0) gpio_out(GPIO_LED_LINK, 1);
else gpio_out(GPIO_DP_LED_LINK, 1);
sfp_match(port);
calib_t24p(WRC_MODE_MASTER, &cal_phase_transition[port],port);
wrc_ptp_start(port);
link_status[port] = LINK_WENT_UP;
rv = 1;
......@@ -182,18 +182,13 @@ static int wrc_check_link(void)
else gpio_out(GPIO_DP_LED_LINK, 0);
link_status[port] = LINK_WENT_DOWN;
wrc_ptp_stop(port);
minic_rst(port);
ep_init(mac_addr[port], port);
timer_delay_ms(200);
ep_enable(1, 1, port);
minic_init(port);
/* special case */
if (port==0) {
net_rst();
ep_init(mac_addr[0], 0);
ep_init(mac_addr[1], 1);
/* Sleep for 1s to make sure WRS v4.2 always realizes that
* the link is down */
timer_delay_ms(200);
ep_enable(1, 1, 0);
ep_enable(1, 1, 1);
minic_init(0);
minic_init(1);
spll_init(SPLL_MODE_FREE_RUNNING_MASTER, 0, 1);
shw_pps_gen_enable_output(0);
}
......
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