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Software for White Rabbit PTP Core
Commit 2c948468 authored by li hongming's avatar li hongming
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make clk out(OUT9 of AD9516) to output 10MHz.

parent d195ca30
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Showing with 6 additions and 6 deletions
dev/ad9516.c
View file @ 2c948468
......@@ -257,7 +257,7 @@ int ad9516_init(int scb_version)
ad9516_set_output_divider(oc_spi_base, 3, 4, 0); // OUT3. 187.5 MHz. - not anymore
ad9516_set_output_divider(oc_spi_base, 4, 1, 0); // OUT4. 500 MHz.
ad9516_set_output_divider(oc_spi_base, 9, 4,0); // OUT9. 125 MHz.
// ad9516_set_output_divider(oc_spi_base, 9, 50, 0); // OUT9. 125 MHz.
/*The following PLL outputs have been configured through the ad9516_base_config_34 register,
* so it doesn't need to replicate the configuration:
......
dev/ad9516_config.h
View file @ 2c948468
......@@ -130,10 +130,10 @@ const struct ad9516_reg ad9516_base_config_34[] = {
{0x019B, 0x11},
{0x019C, 0x20},
{0x019D, 0x00},
{0x019E, 0x33},
{0x019E, 0x00},
{0x019F, 0x00},
{0x01A0, 0x11},
{0x01A1, 0x20},
{0x01A0, 0xCB},
{0x01A1, 0x00},
{0x01A2, 0x00},
{0x01A3, 0x00},
//
......
softpll/spll_external.c
View file @ 2c948468
......@@ -160,10 +160,10 @@ int external_align_fsm(volatile struct spll_external_state *s)
if(align_sample(1, &v)) {
v %= ALIGN_SAMPLE_PERIOD;
if(v == 0 || v >= ALIGN_SAMPLE_PERIOD / 2) {
s->align_target = EXT_PERIOD_NS;
s->align_target = 0;
s->align_step = -100;
} else if (s > 0) {
s->align_target = 0;
s->align_target = ALIGN_SAMPLE_PERIOD-EXT_PERIOD_NS;
s->align_step = 100;
}
......
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