Commit 2b6586cf authored by Tomasz Wlostowski's avatar Tomasz Wlostowski

boards/wr2rf-vme: initial port for the WR2RF board...

parent bcf1bdeb
Pipeline #707 failed with stage
in 22 seconds
......@@ -39,6 +39,11 @@ config TARGET_PXIE_FMC
help
PXIe FMC Carrier (Zynq Ultrascale+)
config TARGET_WR2RF_VME
bool "WR2RF-VME Board (v1)"
help
WR2RF-VME Board (v1)
endchoice
config WR_NODE
......
......@@ -5,10 +5,14 @@ obj-$(CONFIG_TARGET_AFCZ) += boards/afcz/board.o
obj-$(CONFIG_TARGET_SIS8300KU) += boards/sis8300ku/board.o
obj-$(CONFIG_TARGET_ERTM14) += boards/ertm14/board.o boards/ertm14/ertm15_rf_distr.o boards/ertm14/phy_calibration.o boards/ertm14/rf_frame_transceiver.o boards/ertm14/cmd_ertm14.o boards/ertm14/sdbfs-custom-image.o
obj-$(CONFIG_TARGET_PXIE_FMC) += boards/pxie-fmc/board.o
obj-$(CONFIG_TARGET_WR2RF_VME) += boards/wr2rf-vme/board.o boards/wr2rf-vme/sdbfs-custom-image.o boards/ertm14/phy_calibration.o
boards/ertm14/sdbfs-custom-image.h: boards/ertm14/sdbfs
./tools/gensdbfs -c boards/ertm14/sdbfs-custom-image.h boards/ertm14/sdbfs boards/ertm14/sdbfs-custom-image.bin
boards/wr2rf-vme/sdbfs-custom-image.h: boards/wr2rf-vme/sdbfs
./tools/gensdbfs -c boards/wr2rf-vme/sdbfs-custom-image.h boards/wr2rf-vme/sdbfs boards/wr2rf-vme/sdbfs-custom-image.bin
# echo "DUPA"
# sleep 10
......
#include "board.h"
#include <board.h>
#include "dev/syscon.h"
#include "dev/endpoint.h"
#include <softpll_ng.h>
......
/*
* This work is part of the White Rabbit project
*
* Copyright (C) 2019 CERN (www.cern.ch)
* Author: Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
*
* This program is free software: you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation, either version 3 of the License, or (at your
* option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdint.h>
#include <stdio.h>
#include <ppsi/ppsi.h>
#include "dev/gpio.h"
#include "dev/bb_spi.h"
#include "dev/ad951x.h"
#include "dev/ltc695x.h"
#include "dev/ad9910.h"
#include "dev/clock_monitor.h"
#include "dev/24aa025.h"
#include "dev/ad7888.h"
#include "dev/spi_flash.h"
#include "dev/bb_i2c.h"
#include "dev/pps_gen.h"
#include "dev/console.h"
#include "dev/endpoint.h"
#include "dev/netif.h"
#include "storage.h"
#include "wrc_ptp.h"
#include <wrc-event.h>
#include "wrc-task.h"
int wrc_board_early_init()
{
static int32_t flash_entry_points[64];
int i;
// bist_init( ertm_bist );
// wrc_register_sensors( ertm_sensors );
/* initialize SPI flash */
bb_spi_create( &spi_wrc_flash,
&pin_sysc_spi_ncs,
&pin_sysc_spi_mosi,
&pin_sysc_spi_miso,
&pin_sysc_spi_sclk, 0 );
spi_flash_create( &wrc_flash_dev, &spi_wrc_flash, 16384, 0x600000 );
#if 0
uint32_t ts = timer_get_tics();
for(i=0;i<1000000;i++)
{
//gen_gpio_out(&pin_sysc_spi_sclk, 0);
//gen_gpio_out(&pin_sysc_spi_sclk, 1);
sysc_gpio_set_out(&pin_sysc_spi_sclk, 0);
sysc_gpio_set_out(&pin_sysc_spi_sclk, 1);
}
uint32_t te = timer_get_tics();
pp_printf("meas: %d ms\n", te - ts);
for(;;);
#endif
uint32_t id = spi_flash_read_id( &wrc_flash_dev );
// bist_checkpoint( ertm_bist, ERTM14_BIST_FLASH_PRESENCE, 0, id == ERTM14_EXPECTED_FLASH_ID );
/* initialize I2C bus */
// bb_i2c_init( &dev_i2c_fmc );
for(i = 0; i < 32 + 8; i++)
flash_entry_points[i] = 0x600000 + 0x40000 * i;
flash_entry_points[i] = -1;
/* init storage (we use the SPI flash on eRTM14) */
storage_spiflash_create( &wrc_storage_dev, &wrc_flash_dev );
wrc_storage_dev.entry_points = &flash_entry_points[0];
int rv = storage_mount( &wrc_storage_dev );
// bist_checkpoint( ertm_bist, ERTM14_BIST_FLASH_FS_MOUNT, 0, rv == 0 );
/* reset the networking part of the WRCore and start the WR Endpoint */
net_rst();
ep_init( &wrc_endpoint_dev, (void *) BASE_EP );
netif_register_device( "wru0", "default", &wrc_endpoint_dev );
/* Sleep for 1s to make sure WRS v4.2 always realizes that
* the link is down */
timer_delay_ms(200);
ep_enable( &wrc_endpoint_dev, 1, 1);
timer_delay_ms(200);
// int ll = ertm14_low_level_init();
// bist_summary( ertm_bist );
return 0;
}
extern int phy_calibration_poll(void);
extern void phy_calibration_init(void);
int wrc_board_init()
{
wrc_task_create( "phy-cal", phy_calibration_init, phy_calibration_poll );
return 0;
}
int wrc_board_create_tasks()
{
return 0;
}
/*
* This work is part of the White Rabbit project
*
* Released according to the GNU GPL, version 2 or any later version.
*/
#ifndef __BOARD_WR2RF_VME_H
#define __BOARD_WR2RF_VME_H
#include "dev/gpio.h"
#include "dev/bb_spi.h"
#include "dev/24aa025.h"
#include "dev/spi_flash.h"
#include "dev/bb_i2c.h"
#define BOARD_USE_CUSTOM_SDBFS 1
#define BOARD_HAS_CUSTOM_NETWORK_INIT 1
#define BOARD_MAX_CONSOLE_DEVICES 2
/* Board-specific parameters */
#define TICS_PER_SECOND 1000
/* WR Core system/CPU clock frequency in Hz */
#define CPU_CLOCK 62500000ULL
/* WR Reference clock period (picoseconds) and frequency (Hz) */
#define REF_CLOCK_PERIOD_PS 16000
#define REF_CLOCK_FREQ_HZ 62500000
/* Center DMTD frequency (Hz) */
#define DMTD_CLOCK_FREQ_HZ 62500000
/* Baud rate of the builtin UART (does not apply to the VUART) */
#define CONSOLE_UART_BAUDRATE 921600ULL
/* Maximum number of simultaneously created sockets */
#define NET_MAX_SOCKETS 12
/* Socket buffer size, determines the max. RX packet size */
#define NET_MAX_SKBUF_SIZE 512
/* Number of auxillary clock channels - usually equal to the number of FMCs */
#define NUM_AUX_CLOCKS 1
int board_init(void);
int board_update(void);
/* spll parameter that are board-specific */
# define BOARD_DIVIDE_DMTD_CLOCKS 0
# define NS_PER_CLOCK 16
#define BOARD_MAX_CHAN_REF 1
#define BOARD_MAX_CHAN_AUX 2
#define BOARD_MAX_PTRACKERS 1
#define ERTM14_MAX_CONFIGS 8
#define SDB_ADDRESS 0x50000
#define FMC_EEPROM_ADR 0x50
#define SDBFS_REC 5
#define BASE_AUXWB 0x48000
#define BASE_SOFTPLL 0x40200
#define BASE_PPS_GEN 0x40300
#define BASE_UART 0x40500
#define BASE_SYSCON 0x40400
#define BASE_EP 0x40100
#define BASE_MINIC 0x40000
#define BASE_ONEWIRE 0x40600
#endif /* __BOARD_WRC_H */
#include <stdint.h>
const uint32_t sdbfs_default_bin[] =
{
#include "sdbfs-custom-image.h"
};
// generated by tools/gensdbfs. Don't hand-edit unless you know what you're doing...
0x5344422D,
0x00040101,
0x00000000,
0x00000000,
0x00000000,
0x006303FF,
0x46696C65,
0x44617461,
0x2E202020,
0x00000001,
0x00000000,
0x2E202020,
0x20202020,
0x20202020,
0x20202020,
0x20202000,
0x00000000,
0x00000006,
0x00000000,
0x00620000,
0x00000000,
0x0062FFFF,
0x46696C65,
0x44617461,
0x7366702D,
0x00000001,
0x00000000,
0x7366702D,
0x64617461,
0x62617365,
0x20202020,
0x20202001,
0x00000000,
0x00000006,
0x00000000,
0x00610000,
0x00000000,
0x0061FFFF,
0x46696C65,
0x44617461,
0x77722D69,
0x00000001,
0x00000000,
0x77722D69,
0x6E697420,
0x20202020,
0x20202020,
0x20202001,
0x00000000,
0x00000006,
0x00000000,
0x00630000,
0x00000000,
0x006303FF,
0x46696C65,
0x44617461,
0x63616C69,
0x00000001,
0x00000000,
0x63616C69,
0x62726174,
0x696F6E20,
0x20202020,
0x20202001
......@@ -29,6 +29,8 @@
# include "boards/sis8300ku/board.h"
#elif defined(CONFIG_TARGET_PXIE_FMC)
# include "boards/pxie-fmc/board.h"
#elif defined(CONFIG_TARGET_WR2RF_VME)
# include "boards/wr2rf-vme/board.h"
#endif
extern struct wr_endpoint_device wrc_endpoint_dev;
......
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