Makefile: split a long rule using dependencies

This also removes the run of $SIZE on all object files, as the previous content of the screen is often more important for me. Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Makefile: split a long rule using dependencies
This also removes the run of $SIZE on all object files, as the previous content of the screen is often more important for me. Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
27413100 · Alessandro Rubini · 922fbf87 · 27413100
Commit 27413100 authored Oct 17, 2012 by Alessandro Rubini
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Showing with 17 additions and 9 deletions

Makefile Makefile +17 -9

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--- a/Makefile
+++ b/Makefile
@@ -80,17 +80,25 @@ OUTPUT = wrc

 REVISION=$(shell git describe --dirty --always)

-all: tools wrc
+all: tools $(OUTPUT).ram $(OUTPUT).vhd $(OUTPUT).elf

-wrc: silentoldconfig $(OBJS)
+.PRECIOUS: %.elf %.bin
+.PHONY: all tools clean
+
+$(OUTPUT).elf: silentoldconfig $(OBJS)
 	$(CC) $(CFLAGS) -DGIT_REVISION=\"$(REVISION)\" -c revision.c
-	$(SIZE) -t $(OBJS)
-	${CC} -o $(OUTPUT).elf revision.o $(OBJS) $(LDFLAGS)
-	${OBJCOPY} -O binary $(OUTPUT).elf $(OUTPUT).bin
+	${CC} -o $@ revision.o $(OBJS) $(LDFLAGS)
 	${OBJDUMP} -d $(OUTPUT).elf > $(OUTPUT)_disasm.S
-	cd tools; $(MAKE)
-	./tools/genraminit $(OUTPUT).bin 0 > $(OUTPUT).ram
-	./tools/genramvhd -s 90112 $(OUTPUT).bin > $(OUTPUT).vhd
+	$(SIZE) $@
+
+%.bin: %.elf
+	${OBJCOPY} -O binary $^ $@
+
+%.ram: tools %.bin
+	./tools/genraminit $*.bin 0 > $@
+
+%.vhd: tools %.bin
+	./tools/genramvhd -s 90112 $*.bin > $@

 $(OBJS): include/board.h

@@ -105,7 +113,7 @@ clean:
 	${CC} $(CFLAGS) $(PTPD_CFLAGS) $(INCLUDE_DIR) $(LIB_DIR) -c $*.c -o $@

 tools:
-	make -C tools
+	$(MAKE) -C tools

 # following targets from Makefile.kconfig
 silentoldconfig: