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Software for White Rabbit PTP Core
Commits
1d173574
Commit
1d173574
authored
Dec 13, 2011
by
Grzegorz Daniluk
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wrcore_v2: adding syscon driver
parent
097b2d00
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3 changed files
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194 additions
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0 deletions
+194
-0
syscon.c
dev/syscon.c
+30
-0
wrc_syscon_regs.h
include/hw/wrc_syscon_regs.h
+114
-0
syscon.h
include/syscon.h
+50
-0
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dev/syscon.c
0 → 100644
View file @
1d173574
#include "syscon.h"
/****************************
* TIMER
***************************/
void
timer_init
(
uint32_t
enable
)
{
if
(
enable
)
syscon
->
TCR
|=
SYSC_TCR_ENABLE
;
else
syscon
->
TCR
&=
!
SYSC_TCR_ENABLE
;
}
uint32_t
timer_get_tics
()
{
return
syscon
->
TVR
;
}
void
timer_delay
(
uint32_t
how_long
)
{
uint32_t
t_start
;
timer_init
(
1
);
do
{
t_start
=
timer_get_tics
();
}
while
(
t_start
>
UINT32_MAX
-
how_long
);
//in case of overflow
while
(
t_start
+
how_long
>
timer_get_tics
());
}
include/hw/wrc_syscon_regs.h
0 → 100644
View file @
1d173574
/*
Register definitions for slave core: WR Core System Controller
* File : wrc_syscon_regs.h
* Author : auto-generated by wbgen2 from wrc_syscon_wb.wb
* Created : Wed Nov 30 15:46:28 2011
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wrc_syscon_wb.wb
DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
*/
#ifndef __WBGEN2_REGDEFS_WRC_SYSCON_WB_WB
#define __WBGEN2_REGDEFS_WRC_SYSCON_WB_WB
#include <inttypes.h>
#if defined( __GNUC__)
#define PACKED __attribute__ ((packed))
#else
#error "Unsupported compiler?"
#endif
#ifndef __WBGEN2_MACROS_DEFINED__
#define __WBGEN2_MACROS_DEFINED__
#define WBGEN2_GEN_MASK(offset, size) (((1<<(size))-1) << (offset))
#define WBGEN2_GEN_WRITE(value, offset, size) (((value) & ((1<<(size))-1)) << (offset))
#define WBGEN2_GEN_READ(reg, offset, size) (((reg) >> (offset)) & ((1<<(size))-1))
#define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
#endif
/* definitions for register: Syscon reset register */
/* definitions for field: Reset trigger in reg: Syscon reset register */
#define SYSC_RSTR_TRIG_MASK WBGEN2_GEN_MASK(0, 28)
#define SYSC_RSTR_TRIG_SHIFT 0
#define SYSC_RSTR_TRIG_W(value) WBGEN2_GEN_WRITE(value, 0, 28)
#define SYSC_RSTR_TRIG_R(reg) WBGEN2_GEN_READ(reg, 0, 28)
/* definitions for field: Reset line state value in reg: Syscon reset register */
#define SYSC_RSTR_RST WBGEN2_GEN_MASK(28, 1)
/* definitions for register: GPIO Set/Readback Register */
/* definitions for field: Status LED in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_LED_STAT WBGEN2_GEN_MASK(0, 1)
/* definitions for field: Link LED in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_LED_LINK WBGEN2_GEN_MASK(1, 1)
/* definitions for field: FMC I2C bitbanged SCL in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_FMC_SCL WBGEN2_GEN_MASK(2, 1)
/* definitions for field: FMC I2C bitbanged SDA in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_FMC_SDA WBGEN2_GEN_MASK(3, 1)
/* definitions for field: Network AP reset in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_NET_RST WBGEN2_GEN_MASK(4, 1)
/* definitions for field: SPEC Pushbutton 1 state in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_BTN1 WBGEN2_GEN_MASK(5, 1)
/* definitions for field: SPEC Pushbutton 2 state in reg: GPIO Set/Readback Register */
#define SYSC_GPSR_BTN2 WBGEN2_GEN_MASK(6, 1)
/* definitions for register: GPIO Clear Register */
/* definitions for field: Status LED in reg: GPIO Clear Register */
#define SYSC_GPCR_LED_STAT WBGEN2_GEN_MASK(0, 1)
/* definitions for field: Link LED in reg: GPIO Clear Register */
#define SYSC_GPCR_LED_LINK WBGEN2_GEN_MASK(1, 1)
/* definitions for field: FMC I2C bitbanged SCL in reg: GPIO Clear Register */
#define SYSC_GPCR_FMC_SCL WBGEN2_GEN_MASK(2, 1)
/* definitions for field: FMC I2C bitbanged SDA in reg: GPIO Clear Register */
#define SYSC_GPCR_FMC_SDA WBGEN2_GEN_MASK(3, 1)
/* definitions for register: Hardware Feature Register */
/* definitions for field: Memory size in reg: Hardware Feature Register */
#define SYSC_HWFR_MEMSIZE_MASK WBGEN2_GEN_MASK(0, 4)
#define SYSC_HWFR_MEMSIZE_SHIFT 0
#define SYSC_HWFR_MEMSIZE_W(value) WBGEN2_GEN_WRITE(value, 0, 4)
#define SYSC_HWFR_MEMSIZE_R(reg) WBGEN2_GEN_READ(reg, 0, 4)
/* definitions for register: Timer Control Register */
/* definitions for field: Timer Divider in reg: Timer Control Register */
#define SYSC_TCR_TDIV_MASK WBGEN2_GEN_MASK(0, 12)
#define SYSC_TCR_TDIV_SHIFT 0
#define SYSC_TCR_TDIV_W(value) WBGEN2_GEN_WRITE(value, 0, 12)
#define SYSC_TCR_TDIV_R(reg) WBGEN2_GEN_READ(reg, 0, 12)
/* definitions for field: Timer Enable in reg: Timer Control Register */
#define SYSC_TCR_ENABLE WBGEN2_GEN_MASK(31, 1)
/* definitions for register: Timer Counter Value Register */
/* [0x0]: REG Syscon reset register */
#define SYSC_REG_RSTR 0x00000000
/* [0x4]: REG GPIO Set/Readback Register */
#define SYSC_REG_GPSR 0x00000004
/* [0x8]: REG GPIO Clear Register */
#define SYSC_REG_GPCR 0x00000008
/* [0xc]: REG Hardware Feature Register */
#define SYSC_REG_HWFR 0x0000000c
/* [0x10]: REG Timer Control Register */
#define SYSC_REG_TCR 0x00000010
/* [0x14]: REG Timer Counter Value Register */
#define SYSC_REG_TVR 0x00000014
#endif
include/syscon.h
0 → 100644
View file @
1d173574
#ifndef __SYSCON_H
#define __SYSCON_H
#include <inttypes.h>
#include "board.h"
#include <hw/wrc_syscon_regs.h>
struct
SYSCON_WB
{
uint32_t
RSTR
;
/*Syscon Reset Register*/
uint32_t
GPSR
;
/*GPIO Set/Readback Register*/
uint32_t
GPCR
;
/*GPIO Clear Register*/
uint32_t
HWFR
;
/*Hardware Feature Register*/
uint32_t
TCR
;
/*Timer Control Register*/
uint32_t
TVR
;
/*Timer Counter Value Register*/
};
/*GPIO pins*/
#define GPIO_LED_LINK SYSC_GPSR_LED_LINK
#define GPIO_LED_STAT SYSC_GPSR_LED_STAT
#define GPIO_SCL SYSC_GPSR_FMC_SCL
#define GPIO_SDA SYSC_GPSR_FMC_SDA
#define GPIO_BTN1 SYSC_GPSR_BTN1
#define GPIO_BTN2 SYSC_GPSR_BTN2
void
timer_init
(
uint32_t
enable
);
uint32_t
timer_get_tics
();
void
timer_delay
(
uint32_t
how_long
);
static
volatile
struct
SYSCON_WB
*
syscon
=
(
volatile
struct
SYSCON_WB
*
)
BASE_SYSCON
;
/****************************
* GPIO
***************************/
static
inline
void
gpio_out
(
int
pin
,
int
val
)
{
if
(
val
)
syscon
->
GPSR
=
pin
;
else
syscon
->
GPCR
=
pin
;
}
static
inline
int
gpio_in
(
int
pin
)
{
return
syscon
->
GPSR
&
pin
?
1
:
0
;
}
#endif
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