Kconfig: add support for riscv

Fist buildable version for riscv Requires commit in ppsi: arch-wrpc: enable build for riscv Signed-off-by: Adam Wujek <dev_public@wujek.eu>

Kconfig: add support for riscv
Fist buildable version for riscv Requires commit in ppsi: arch-wrpc: enable build for riscv Signed-off-by: Adam Wujek <dev_public@wujek.eu>
189ebb7f · Adam Wujek · Adam Wujek · 50d70b84 · 189ebb7f · 189ebb7f
Commit 189ebb7f authored Feb 23, 2021 by Adam Wujek Committed by Adam Wujek Mar 05, 2021
15 changed files
--- a/Kconfig
+++ b/Kconfig

 mainmenu "WR PTP Core software configuration"

+choice
+	prompt "Architecture"
+
+config ARCH_LM32
+	bool "LM32"
+	help
+	  Use LM32
+
+config ARCH_RISCV
+	bool "riscV"
+	help
+	  Use riscV
+
+endchoice
+
 choice
 	prompt "Target Platform"

@@ -115,13 +130,10 @@ config HOST_PROCESS
 	boolean
 	default n

-config LM32
-	boolean
-	default !HOST_PROCESS

 config EMBEDDED_NODE
 	boolean
-	default LM32 && WR_NODE
+	default (ARCH_LM32 || ARCH_RISCV) && WR_NODE

 # CONFIG_WR_SWITCH has no further options at all at this point

@@ -527,7 +539,7 @@ config HOST_PROCESS
 	boolean "Build as a host process, to develop/debug network"

 config CUSTOM_RAMSIZE
-	depends on DEVELOPER && LM32
+	depends on DEVELOPER && (ARCH_LM32 || ARCH_RISCV)
 	int "Size of the RAM in the FPGA for this program"
 	default 131072
 	help
@@ -537,7 +549,7 @@ config CUSTOM_RAMSIZE
 	  choose your preferred value here.

 config CUSTOM_STACKSIZE
-	depends on DEVELOPER && LM32
+	depends on DEVELOPER && (ARCH_LM32 || ARCH_RISCV)
 	int "Size of the stack area needed by this program"
 	default 2048
 	help
@@ -567,7 +579,7 @@ config TEMP_HIGH_RAPPEL
 	int "Remember over-temperature every that many seconds"

 config CMD_LL
-	depends on DEVELOPER && LM32
+	depends on DEVELOPER && (ARCH_LM32 || ARCH_RISCV)
 	bool "Build low-level commands for development/testing"
 	help
 	  This enables low-level commands: "devmem" to read/write memory
@@ -585,13 +597,13 @@ config DAC_LOG
 	  to set ipaddress and mac of the target host. UDP port is 1050.

 config FLASH_INIT
-	depends on DEVELOPER && LM32
+	depends on DEVELOPER && (ARCH_LM32 || ARCH_RISCV)
 	default y
 	boolean "Read init commands from flash storage"

 # CHECK_RESET for switch and node
 config CHECK_RESET
-	depends on DEVELOPER && LM32 || TARGET_WR_SWITCH
+	depends on DEVELOPER && (ARCH_LM32 || ARCH_RISCV) || TARGET_WR_SWITCH
 	bool "Print a stack trace if reset happens"
 	help
 	  If the CPU is following a NULL pointer, the program will
@@ -600,7 +612,7 @@ config CHECK_RESET
 	  then clears the stack (for next time) and restarts again.

 config SPLL_FIFO_LOG
-	depends on DEVELOPER && LM32
+	depends on DEVELOPER && (ARCH_LM32 || ARCH_RISCV)
 	bool "Add a circular buffer for spll logging, used by tools/wrpc-dump"
 	help
 	  This option addrs 256 bytes to the wrpc bynary, to log

--- a/Makefile
+++ b/Makefile
 # Tomasz Wlostowski for CERN, 2011,2012
 -include $(CURDIR)/.config

-CROSS_COMPILE ?= lm32-elf-
+CROSS_COMPILE-$(CONFIG_ARCH_LM32) ?= lm32-elf-
+CROSS_COMPILE-$(CONFIG_ARCH_RISCV) ?= riscv-elf-
+
+CROSS_COMPILE ?= $(CROSS_COMPILE-y)
+
+ifeq ($(CONFIG_ARCH_LM32),y)
+CPU_ARCH = LM32
+endif
+ifeq ($(CONFIG_ARCH_RISCV),y)
+CPU_ARCH = RISCV
+endif
+

 ifdef CONFIG_HOST_PROCESS
  CROSS_COMPILE =
@@ -29,8 +40,11 @@ PPSI = ppsi
 MAKEALL_COPY_LIST=.bin .elf

 # we miss CONFIG_ARCH_LM32 as we have no other archs by now
-obj-$(CONFIG_LM32) = arch/lm32/crt0.o arch/lm32/irq.o
-LDS-$(CONFIG_WR_NODE)   = arch/lm32/ram.ld
+obj-$(CONFIG_ARCH_LM32) = arch/lm32/crt0.o arch/lm32/irq.o
+obj-$(CONFIG_ARCH_RISCV) = arch/risc-v/crt0.o arch/risc-v/irq.o arch/risc-v/irq_helper.o
+# silently assume WR_NODE for the next two
+LDS-$(CONFIG_ARCH_LM32)   = arch/lm32/ram.ld
+LDS-$(CONFIG_ARCH_RISCV)  = arch/risc-v/ram.ld
 LDS-$(CONFIG_TARGET_WR_SWITCH) = arch/lm32/ram-wrs.ld
 LDS-$(CONFIG_HOST_PROCESS) =

@@ -47,7 +61,8 @@ obj-$(CONFIG_PPSI) += dump-info.o
 cflags-y =	-ffreestanding -include $(AUTOCONF) -Iinclude \
 			-I. -Isoftpll -Iipc
 cflags-y +=	-I$(CURDIR)/pp_printf
-cflags-$(CONFIG_LM32) +=  -Iinclude/std
+cflags-$(CONFIG_ARCH_LM32)  +=  -Iinclude/std
+cflags-$(CONFIG_ARCH_RISCV) +=  -Iinclude/std

 cflags-$(CONFIG_PPSI) += \
 	-include include/ppsi-wrappers.h \
@@ -68,10 +83,15 @@ obj-$(CONFIG_EMBEDDED_NODE) += \
 	monitor/monitor_ppsi.o \
 	lib/ppsi-wrappers.o

-cflags-$(CONFIG_LM32) += -mmultiply-enabled -mbarrel-shift-enabled
-ldflags-$(CONFIG_LM32) = -mmultiply-enabled -mbarrel-shift-enabled \
+cflags-$(CONFIG_ARCH_LM32) += -mmultiply-enabled -mbarrel-shift-enabled
+cflags-$(CONFIG_ARCH_RISCV) += -march=rv32im -mabi=ilp32
+ldflags-$(CONFIG_ARCH_LM32) = -mmultiply-enabled -mbarrel-shift-enabled \
+	-nostdlib -T $(LDS-y)
+ldflags-$(CONFIG_ARCH_RISCV) = -march=rv32im -mabi=ilp32 \
 	-nostdlib -T $(LDS-y)
-arch-files-$(CONFIG_LM32) = $(OUTPUT).bram $(OUTPUT).vhd $(OUTPUT).mif
+asflags-$(CONFIG_ARCH_RISCV) += -march=rv32im -mabi=ilp32
+arch-files-$(CONFIG_ARCH_LM32) = $(OUTPUT).bram $(OUTPUT).vhd $(OUTPUT).mif
+arch-files-$(CONFIG_ARCH_RISCV) = $(OUTPUT).bram $(OUTPUT).vhd $(OUTPUT).mif


 # packet-filter rules: for CONFIG_VLAN we use both sets
@@ -98,7 +118,9 @@ ifndef CONFIG_PPSI
  obj-y += pp_printf/div64.o
 endif
 # And always complain if we pick the libgcc division: 64/32 = 32 is enough here.
-obj-$(CONFIG_LM32) += check-error.o
+obj-$(CONFIG_ARCH_LM32)  += check-error.o
+obj-$(CONFIG_ARCH_RISCV) += check-error.o
+

 # add system check functions like stack overflow and check reset
 obj-y += system_checks.o
@@ -112,13 +134,11 @@ CFLAGS = $(cflags-y) -Wall -Wstrict-prototypes \
 	-include include/wrc.h -ggdb

 # Assembler Flags
-ASFLAGS = -I.
+ASFLAGS = -I. $(asflags-y)

 LDFLAGS = $(ldflags-y) \
 	-Wl,--gc-sections -Os -lgcc -lc

-WRC-O-FLAGS-$(CONFIG_LM32) =  -e _start
-
 OBJS = $(obj-y)

 OUTPUT-$(CONFIG_WR_NODE)   = wrc
@@ -151,7 +171,8 @@ endif
 PPSI-CFG-y = wrpc_defconfig
 PPSI-CFG-$(CONFIG_P2P) = wrpc_pdelay_defconfig
 PPSI-CFG-$(CONFIG_HOST_PROCESS) = unix_defconfig
-PPSI-FLAGS-$(CONFIG_LM32) = CONFIG_NO_PRINTF=y
+PPSI-FLAGS-$(CONFIG_ARCH_LM32) = CONFIG_NO_PRINTF=y
+PPSI-FLAGS-$(CONFIG_ARCH_RISCV) = CONFIG_NO_PRINTF=y
 PPSI-FLAGS-$(CONFIG_TARGET_GENERIC_PHY_8BIT) = CONFIG_TARGET_GENERIC_PHY_8BIT=y

 $(obj-ppsi): gitmodules
@@ -163,10 +184,11 @@ $(obj-ppsi): gitmodules
 	fi
 	$(MAKE) -C $(PPSI) ppsi.a WRPCSW_ROOT=.. \
 		CROSS_COMPILE=$(CROSS_COMPILE) CONFIG_NO_PRINTF=y \
-		USER_CFLAGS="$(PPSI_USER_CFLAGS)"
+		USER_CFLAGS="$(PPSI_USER_CFLAGS)" \
+		CPU_ARCH=$(CPU_ARCH)

 sdb-lib/libsdbfs.a:
-	$(MAKE) -C sdb-lib
+	$(MAKE) -C sdb-lib CPU_ARCH=$(CPU_ARCH)

 $(OUTPUT).elf: $(LDS-y) $(AUTOCONF) gitmodules config.o pconfig.o $(OBJS)
 	$(CC) $(CFLAGS) -D__GIT_VER__="\"$(GIT_VER)\"" -D__GIT_USR__="\"$(GIT_USR)\"" -c revision.c
@@ -176,7 +198,8 @@ $(OUTPUT).elf: $(LDS-y) $(AUTOCONF) gitmodules config.o pconfig.o $(OBJS)
 	./save_size.sh $(SIZE) $@


-OBJCOPY-TARGET-$(CONFIG_LM32) = -O elf32-lm32 -B lm32
+OBJCOPY-TARGET-$(CONFIG_ARCH_LM32) = -O elf32-lm32 -B lm32
+OBJCOPY-TARGET-$(CONFIG_ARCH_RISCV) = -O elf32-littleriscv -B riscv
 OBJCOPY-TARGET-$(CONFIG_HOST_PROCESS) = -O elf64-x86-64 -B i386

 config.o: .config $(AUTOCONF)

--- a/arch/risc-v/crt0.S
+++ b/arch/risc-v/crt0.S
+#define __ASSEMBLY__
+#include "include/revision.h"
+#include "ppsi/include/hw-specific/wrh.h"
+#include "arch/risc-v/crt0.h"
+#include "include/generated/autoconf.h"

  .section    .boot, "ax", @progbits

@@ -11,7 +16,50 @@ _start:
 _exception_entry:
  j trap_entry

+.org WRPC_MARK
+/* Used by the dumping tool to identify byte ordering */	
+.ascii	"WRPC----"
+.int	0x01234567
+.short	0x89ab, 0xcdef
+/* Pointer to structures, for the dumping tool */
+.org SOFTPLL_PADDR
+    .word softpll
+.org FIFO_LOG_PADDR
+    .word fifo_log
+#ifdef CONFIG_PPSI
+.org PPG_STATIC_PADDR
+    .word ppg_static
+#endif
+.org STATS_PADDR
+    .word stats
+
+.org UPTIME_SEC_ADDR
+.global uptime_sec
+uptime_sec:
+    .word 0
+
+.org VERSION_WRPC_ADDR
+.global version_wrpc
+version_wrpc:
+    .byte WRPC_SHMEM_VERSION
+
+.org VERSION_PPSI_ADDR
+.global version_ppsi
+version_ppsi:
+    .byte WRS_PPSI_SHMEM_VERSION
+
+/* Pointer to a structure used by testbenches, use only when
+ * CONFIG_WR_NODE_SIM is set */
+.org HDL_TESTBENCH_PADDR
+.global hdl_testbench_p
+hdl_testbench_p:
+#ifdef CONFIG_WR_NODE_SIM
+    .word hdl_testbench
+#else
+    .word 0
+#endif

+.org 0x100

 _entry:


--- a/arch/risc-v/crt0.h
+++ b/arch/risc-v/crt0.h
+/*
+* This work is part of the White Rabbit project
+*
+* Copyright (C) 2017 CERN (www.cern.ch)
+* Author: Adam Wujek <adam.wujek@cern.ch>
+*
+* Released according to the GNU GPL, version 2 or any later version.
+*/
+#ifndef __CRT0_H__
+#define __CRT0_H__
+
+/* offsets for crt0.s */
+#define WRPC_MARK		0x80
+#define SOFTPLL_PADDR		0x90
+#define FIFO_LOG_PADDR		0x94
+#define PPG_STATIC_PADDR	0x98
+#define STATS_PADDR		0x9c
+#define UPTIME_SEC_ADDR		0xa0
+#define VERSION_WRPC_ADDR	0xa4
+#define VERSION_PPSI_ADDR	0xa5
+#define HDL_TESTBENCH_PADDR	0xbc
+
+#endif /* __CRT0_H__ */
--- a/arch/risc-v/irq_helper.c
+++ b/arch/risc-v/irq_helper.c
+/*
+ * This work is part of the White Rabbit project
+ *
+ * Copyright (C) 2011 CERN (www.cern.ch)
+ * Author: Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
+ *
+ * Released according to the GNU GPL, version 2 or any later version.
+ */
+#include "irq.h"
+
+void disable_irq(void)
+{
+#warning (FIXME: disable_irq)
+}
+
+void enable_irq(void)
+{
+#warning (FIXME: enable_irq)
+}
--- a/arch/risc-v/ram.ld.S
+++ b/arch/risc-v/ram.ld.S
@@ -135,7 +135,7 @@ SECTIONS
    *(.bss.*)
    *(.gnu.linkonce.b.*)
    *(COMMON)
-  } > ram2
+  } > ram

  /* End of RAM for checking stack overflows */
 	PROVIDE(_endram = ORIGIN(stack));
@@ -144,5 +144,7 @@ SECTIONS
 	PROVIDE(_fstack = ORIGIN(stack) + LENGTH(stack) - 0x400);
  PROVIDE(_fexception_stack = ORIGIN(stack) + LENGTH(stack) - 0x4);
  PROVIDE(_end = .);
+/* This may be missing, according to .config */
+  PROVIDE(fifo_log = 0);

 }
--- a/dev/dev.mk
+++ b/dev/dev.mk

 # Those hardware-specific files should not be built for the host, even if
 # most of them give no error no warning. The host has different implementations
-obj-$(CONFIG_LM32) += 	dev/simple_uart.o dev/console.o
+obj-$(CONFIG_ARCH_LM32) += 	dev/simple_uart.o dev/console.o
+obj-$(CONFIG_ARCH_RISCV) += 	dev/simple_uart.o dev/console.o

 obj-$(CONFIG_EMBEDDED_NODE) += \
 	dev/endpoint.o \

--- a/include/irq.h
+++ b/include/irq.h
@@ -8,6 +8,10 @@

 #ifdef unix
  static inline void clear_irq(void) {}
+#elif defined(CONFIG_ARCH_RISCV)
+  /* FIXME: fix for riscv */
+  #warning FIXME: fix irq.h for riscv
+  static inline void clear_irq(void) {}
 #else
 static inline void clear_irq(void)
 {

--- a/include/ppsi-wrappers.h
+++ b/include/ppsi-wrappers.h
@@ -10,6 +10,12 @@

 #ifdef CONFIG_HOST_PROCESS
 #  include <arpa/inet.h>
+#elif defined(CONFIG_ARCH_RISCV)
+/* FIXME: fix endianness for riscV */
+#define ntohs(x) (x)
+#define ntohl(x) (x)
+#define htons(x) (x)
+#define htons(x) (x)
 #else

 #  ifndef __IEEE_BIG_ENDIAN

--- a/lib/lib.mk
+++ b/lib/lib.mk
@@ -3,11 +3,17 @@ obj-y += \
 	lib/wrc-tasks.o \
 	lib/events-ptp.o \

-obj-$(CONFIG_LM32) += \
+obj-$(CONFIG_ARCH_LM32) += \
 	lib/assert.o \
 	lib/usleep.o \
 	lib/event.o

+obj-$(CONFIG_ARCH_RISCV) += \
+	lib/assert.o \
+	lib/usleep.o \
+	lib/event.o
+
+
 obj-$(CONFIG_WR_NODE) += lib/net.o

 obj-$(CONFIG_IP) += lib/ipv4.o lib/arp.o lib/icmp.o lib/udp.o lib/bootp.o

--- a/lib/util.c
+++ b/lib/util.c
@@ -272,6 +272,14 @@ int atoi(const char *s)
 	return res;
 }

+#ifdef CONFIG_ARCH_RISCV
+#warning (FIXME: fix endiansess conversion functions)
+#define ntohs(x) (x)
+#define ntohl(x) (x)
+#define htons(x) (x)
+#define htons(x) (x)
+
+#endif

 /* To save code, in the div of two int64 numbers
 * use signed 64bit division, then correct the sign of the result */

--- a/ppsi @ 643e153d
+++ b/ppsi @ 643e153d
-Subproject commit de2bb43c92c40264b983893eb5f94be73539f989
+Subproject commit 643e153d5d31efc0f7df14d3ba35a045e061e6c1
--- a/sdb-lib/Makefile
+++ b/sdb-lib/Makefile
@@ -19,7 +19,10 @@ OBJDUMP         = $(CROSS_COMPILE)objdump
 # calculate endianness at compile time
 ENDIAN := $(shell ./check-endian $(CC))

-CFLAGS = -Wall -ggdb -Os -mmultiply-enabled -mbarrel-shift-enabled
+CFLAGS-CPU-LM32  = -mmultiply-enabled -mbarrel-shift-enabled
+CFLAGS-CPU-RISCV = -march=rv32im -mabi=ilp32
+
+CFLAGS = -Wall -ggdb -Os $(CFLAGS-CPU-$(CPU_ARCH))
 CFLAGS += -I../include/linux -I../include # for <sdb.h>
 CFLAGS += -ffunction-sections -fdata-sections
 CFLAGS += -Wno-pointer-sign

--- a/sdb-lib/libsdbfs-freestanding.h
+++ b/sdb-lib/libsdbfs-freestanding.h
@@ -14,6 +14,13 @@
 #  define htons(x) (x)
 #  define ntohl(x) (x)
 #  define htonl(x) (x)
+#elif CPU_ARCH == RISCV
+/* FIXME: fix for riscv */
+#warning FIXME: fix sdbfs for riscv
+#  define ntohs(x) (x)
+#  define htons(x) (x)
+#  define ntohl(x) (x)
+#  define htonl(x) (x)
 #else
 #  error "No support, yet, for little-endian freestanding library"
 #endif
--- a/softpll/softpll.mk
+++ b/softpll/softpll.mk
-obj-$(CONFIG_LM32) += \
+obj-$(CONFIG_ARCH_LM32) += \
+	softpll/spll_common.o \
+	softpll/spll_external.o \
+	softpll/spll_helper.o \
+	softpll/spll_main.o \
+	softpll/spll_ptracker.o \
+	softpll/softpll_ng.o
+
+obj-$(CONFIG_ARCH_RISCV) += \
 	softpll/spll_common.o \
 	softpll/spll_external.o \
 	softpll/spll_helper.o \