/*
  Register definitions for slave core: WR Core Diagnostics

  * File           : wrc_diags_regs.h
  * Author         : auto-generated by wbgen2 from wrc_diags_wb.wb
  * Created        : Mon May  8 13:58:25 2017
  * Standard       : ANSI C

    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wrc_diags_wb.wb
    DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!

*/

#ifndef __WBGEN2_REGDEFS_WRC_DIAGS_WB_WB
#define __WBGEN2_REGDEFS_WRC_DIAGS_WB_WB

#ifdef __KERNEL__
#include <linux/types.h>
#else
#include <inttypes.h>
#endif

#if defined( __GNUC__)
#define PACKED __attribute__ ((packed))
#else
#error "Unsupported compiler?"
#endif

#ifndef __WBGEN2_MACROS_DEFINED__
#define __WBGEN2_MACROS_DEFINED__
#define WBGEN2_GEN_MASK(offset, size) (((1<<(size))-1) << (offset))
#define WBGEN2_GEN_WRITE(value, offset, size) (((value) & ((1<<(size))-1)) << (offset))
#define WBGEN2_GEN_READ(reg, offset, size) (((reg) >> (offset)) & ((1<<(size))-1))
#define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
#endif


/* definitions for register: Ctrl */

/* definitions for field: WR DIAG data valid in reg: Ctrl */
#define WRC_DIAGS_CTRL_DATA_VALID             WBGEN2_GEN_MASK(0, 1)

/* definitions for field: WR DIAG data snapshot in reg: Ctrl */
#define WRC_DIAGS_CTRL_DATA_SNAPSHOT          WBGEN2_GEN_MASK(8, 1)

/* definitions for register: WRPC Diag: servo status */

/* definitions for field: WR valid in reg: WRPC Diag: servo status */
#define WRC_DIAGS_WDIAG_SSTAT_WR_MODE         WBGEN2_GEN_MASK(0, 1)

/* definitions for field: Servo State in reg: WRPC Diag: servo status */
#define WRC_DIAGS_WDIAG_SSTAT_SERVOSTATE_MASK WBGEN2_GEN_MASK(8, 4)
#define WRC_DIAGS_WDIAG_SSTAT_SERVOSTATE_SHIFT 8
#define WRC_DIAGS_WDIAG_SSTAT_SERVOSTATE_W(value) WBGEN2_GEN_WRITE(value, 8, 4)
#define WRC_DIAGS_WDIAG_SSTAT_SERVOSTATE_R(reg) WBGEN2_GEN_READ(reg, 8, 4)

/* definitions for register: WRPC Diag: Port status */

/* definitions for field: Link Status in reg: WRPC Diag: Port status */
#define WRC_DIAGS_WDIAG_PSTAT_LINK            WBGEN2_GEN_MASK(0, 1)

/* definitions for field: PLL Locked in reg: WRPC Diag: Port status */
#define WRC_DIAGS_WDIAG_PSTAT_LOCKED          WBGEN2_GEN_MASK(1, 1)

/* definitions for register: WRPC Diag: PTP state */

/* definitions for field: PTP State in reg: WRPC Diag: PTP state */
#define WRC_DIAGS_WDIAG_PTPSTAT_PTPSTATE_MASK WBGEN2_GEN_MASK(0, 8)
#define WRC_DIAGS_WDIAG_PTPSTAT_PTPSTATE_SHIFT 0
#define WRC_DIAGS_WDIAG_PTPSTAT_PTPSTATE_W(value) WBGEN2_GEN_WRITE(value, 0, 8)
#define WRC_DIAGS_WDIAG_PTPSTAT_PTPSTATE_R(reg) WBGEN2_GEN_READ(reg, 0, 8)

/* definitions for register: WRPC Diag: AUX state */

/* definitions for field: AUX channel in reg: WRPC Diag: AUX state */
#define WRC_DIAGS_WDIAG_ASTAT_AUX_MASK        WBGEN2_GEN_MASK(0, 8)
#define WRC_DIAGS_WDIAG_ASTAT_AUX_SHIFT       0
#define WRC_DIAGS_WDIAG_ASTAT_AUX_W(value)    WBGEN2_GEN_WRITE(value, 0, 8)
#define WRC_DIAGS_WDIAG_ASTAT_AUX_R(reg)      WBGEN2_GEN_READ(reg, 0, 8)

/* definitions for register: WRPC Diag: Tx PTP Frame cnts */

/* definitions for register: WRPC Diag: Rx PTP Frame cnts */

/* definitions for register: WRPC Diag:local time [msb of s] */

/* definitions for register: WRPC Diag: local time [lsb of s] */

/* definitions for register: WRPC Diag: local time [ns] */

/* definitions for register: WRPC Diag: Round trip (mu) [msb of ps] */

/* definitions for register: WRPC Diag: Round trip (mu) [lsb of ps] */

/* definitions for register: WRPC Diag: Master-slave delay (dms) [msb of ps] */

/* definitions for register: WRPC Diag: Master-slave delay (dms) [lsb of ps] */

/* definitions for register: WRPC Diag: Total link asymmetry [ps] */

/* definitions for register: WRPC Diag: Clock offset (cko) [ps] */

/* definitions for register: WRPC Diag: Phase setpoint (setp) [ps] */

/* definitions for register: WRPC Diag: Update counter (ucnt) */

/* definitions for register: WRPC Diag: Board temperature [C degree] */

PACKED struct WRC_DIAGS_WB {
  /* [0x0]: REG Ctrl */
  uint32_t CTRL;
  /* [0x4]: REG WRPC Diag: servo status */
  uint32_t WDIAG_SSTAT;
  /* [0x8]: REG WRPC Diag: Port status */
  uint32_t WDIAG_PSTAT;
  /* [0xc]: REG WRPC Diag: PTP state */
  uint32_t WDIAG_PTPSTAT;
  /* [0x10]: REG WRPC Diag: AUX state */
  uint32_t WDIAG_ASTAT;
  /* [0x14]: REG WRPC Diag: Tx PTP Frame cnts */
  uint32_t WDIAG_TXFCNT;
  /* [0x18]: REG WRPC Diag: Rx PTP Frame cnts */
  uint32_t WDIAG_RXFCNT;
  /* [0x1c]: REG WRPC Diag:local time [msb of s] */
  uint32_t WDIAG_SEC_MSB;
  /* [0x20]: REG WRPC Diag: local time [lsb of s] */
  uint32_t WDIAG_SEC_LSB;
  /* [0x24]: REG WRPC Diag: local time [ns] */
  uint32_t WDIAG_NS;
  /* [0x28]: REG WRPC Diag: Round trip (mu) [msb of ps] */
  uint32_t WDIAG_MU_MSB;
  /* [0x2c]: REG WRPC Diag: Round trip (mu) [lsb of ps] */
  uint32_t WDIAG_MU_LSB;
  /* [0x30]: REG WRPC Diag: Master-slave delay (dms) [msb of ps] */
  uint32_t WDIAG_DMS_MSB;
  /* [0x34]: REG WRPC Diag: Master-slave delay (dms) [lsb of ps] */
  uint32_t WDIAG_DMS_LSB;
  /* [0x38]: REG WRPC Diag: Total link asymmetry [ps] */
  uint32_t WDIAG_ASYM;
  /* [0x3c]: REG WRPC Diag: Clock offset (cko) [ps] */
  uint32_t WDIAG_CKO;
  /* [0x40]: REG WRPC Diag: Phase setpoint (setp) [ps] */
  uint32_t WDIAG_SETP;
  /* [0x44]: REG WRPC Diag: Update counter (ucnt) */
  uint32_t WDIAG_UCNT;
  /* [0x48]: REG WRPC Diag: Board temperature [C degree] */
  uint32_t WDIAG_TEMP;
};

#endif
