
# PlanAhead Launch Script for Pre-Synthesis Floorplanning, created by Project Navigator

create_project -name sflow -dir "/home/bradomyn/project/wrn-robustness/hdl/sFlow/sym/sflow/planAhead_run_1" -part xc6vlx130tff1156-1
set_param project.pinAheadLayout yes
set srcset [get_property srcset [current_run -impl]]
set_property top wrsw_sflow_wb $srcset
set_param project.paUcfFile  "wrsw_sflow_wb.ucf"
set hdlfile [add_files [list {../../../../../../Xilinx/ISE_DS/ISE/vhdl/src/XilinxCoreLib/fifo_generator_v6_1.vhd}]]
set_property file_type VHDL $hdlfile
set_property library fifo_generator_v6_1 $hdlfile
set hdlfile [add_files [list {../../../../../../Xilinx/ISE_DS/ISE/vhdl/src/XilinxCoreLib/fifo_generator_v6_1_xst.vhd}]]
set_property file_type VHDL $hdlfile
set_property library fifo_generator_v6_1 $hdlfile
set hdlfile [add_files [list {../../top/lib/general-cores/modules/genrams/genram_pkg.vhd}]]
set_property file_type VHDL $hdlfile
set_property library work $hdlfile
set hdlfile [add_files [list {../../top/lib/wbgen2_pkg.vhd}]]
set_property file_type VHDL $hdlfile
set_property library work $hdlfile
set hdlfile [add_files [list {../../top/lib/general-cores/modules/genrams/xilinx/generic_sync_fifo.vhd}]]
set_property file_type VHDL $hdlfile
set_property library work $hdlfile
set hdlfile [add_files [list {../../top/lib/general-cores/modules/genrams/xilinx/generic_async_fifo.vhd}]]
set_property file_type VHDL $hdlfile
set_property library work $hdlfile
set hdlfile [add_files [list {../../top/lib/wbgen2_fifo_sync.vhd}]]
set_property file_type VHDL $hdlfile
set_property library work $hdlfile
set hdlfile [add_files [list {../../top/lib/wbgen2_fifo_async.vhd}]]
set_property file_type VHDL $hdlfile
set_property library work $hdlfile
set hdlfile [add_files [list {../../top/lib/wbgen2_eic.vhd}]]
set_property file_type VHDL $hdlfile
set_property library work $hdlfile
set hdlfile [add_files [list {../../top/wb_sflow_wb.vhd}]]
set_property file_type VHDL $hdlfile
set_property library work $hdlfile
add_files "wrsw_sflow_wb.ucf" -fileset [get_property constrset [current_run]]
open_rtl_design -part xc6vlx130tff1156-1
