System Settings

Environment Settings
Environment Variable | xst | ngdbuild | map | par

LD_LIBRARY_PATH

/home/bradomyn/Xilinx/ISE_DS/ISE//lib/lin64:
/home/bradomyn/Xilinx/ISE_DS/common/lib/lin64:
/home/bradomyn/Xilinx/ISE_DS/ISE/sysgen/lib:
/home/bradomyn/Xilinx/ISE_DS/ISE/lib/lin64:
/home/bradomyn/Xilinx/ISE_DS/ISE/smartmodel/lin64/installed_lin64/lib:
/home/bradomyn/Xilinx/ISE_DS/EDK/lib/lin64

/home/bradomyn/Xilinx/ISE_DS/ISE//lib/lin64:
/home/bradomyn/Xilinx/ISE_DS/common/lib/lin64:
/home/bradomyn/Xilinx/ISE_DS/ISE/sysgen/lib:
/home/bradomyn/Xilinx/ISE_DS/ISE/lib/lin64:
/home/bradomyn/Xilinx/ISE_DS/ISE/smartmodel/lin64/installed_lin64/lib:
/home/bradomyn/Xilinx/ISE_DS/EDK/lib/lin64

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LMC_HOME | /home/bradomyn/Xilinx/ISE_DS/ISE/smartmodel/lin64/installed_lin64 | /home/bradomyn/Xilinx/ISE_DS/ISE/smartmodel/lin64/installed_lin64 | < data not available > | < data not available >

PATH

/home/bradomyn/Xilinx/ISE_DS/ISE//bin/lin64:
/home/bradomyn/Xilinx/ISE_DS/common/bin/lin64:
/home/bradomyn/Xilinx/ISE_DS/ISE/sysgen/bin:
/home/bradomyn/Xilinx/ISE_DS/PlanAhead/bin:
/home/bradomyn/Xilinx/ISE_DS/ISE/bin/lin64:
/home/bradomyn/Xilinx/ISE_DS/ISE/sysgen/util:
/home/bradomyn/Xilinx/ISE_DS/EDK/bin/lin64:
/home/bradomyn/Xilinx/ISE_DS/EDK/gnu/microblaze/lin64/bin:
/home/bradomyn/Xilinx/ISE_DS/EDK/gnu/powerpc-eabi/lin64/bin:
/usr/local/bin:
/usr/bin:
/bin:
/usr/local/sbin:
/usr/sbin:
/sbin:
/usr/bin/core_perl

/home/bradomyn/Xilinx/ISE_DS/ISE//bin/lin64:
/home/bradomyn/Xilinx/ISE_DS/common/bin/lin64:
/home/bradomyn/Xilinx/ISE_DS/ISE/sysgen/bin:
/home/bradomyn/Xilinx/ISE_DS/PlanAhead/bin:
/home/bradomyn/Xilinx/ISE_DS/ISE/bin/lin64:
/home/bradomyn/Xilinx/ISE_DS/ISE/sysgen/util:
/home/bradomyn/Xilinx/ISE_DS/EDK/bin/lin64:
/home/bradomyn/Xilinx/ISE_DS/EDK/gnu/microblaze/lin64/bin:
/home/bradomyn/Xilinx/ISE_DS/EDK/gnu/powerpc-eabi/lin64/bin:
/usr/local/bin:
/usr/bin:
/bin:
/usr/local/sbin:
/usr/sbin:
/sbin:
/usr/bin/core_perl

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XILINX | /home/bradomyn/Xilinx/ISE_DS/ISE/ | /home/bradomyn/Xilinx/ISE_DS/ISE/ | < data not available > | < data not available >
XILINX_DSP | /home/bradomyn/Xilinx/ISE_DS/ISE | /home/bradomyn/Xilinx/ISE_DS/ISE | < data not available > | < data not available >
XILINX_EDK | /home/bradomyn/Xilinx/ISE_DS/EDK | /home/bradomyn/Xilinx/ISE_DS/EDK | < data not available > | < data not available >
XILINX_PLANAHEAD | /home/bradomyn/Xilinx/ISE_DS/PlanAhead | /home/bradomyn/Xilinx/ISE_DS/PlanAhead | < data not available > | < data not available >

Synthesis Property Settings
Switch Name | Property Name | Value | Default Value
-ifn |  | wrsw_sflow_wb.prj |
-ifmt |  | mixed | Mixed
-ofn |  | wrsw_sflow_wb |
-ofmt |  | NGC | NGC
-p |  | xc6vlx130t-1-ff1156 |
-top |  | wrsw_sflow_wb |
-opt_mode | Optimization Goal | Speed | Speed
-opt_level | Optimization Effort | 1 | 1
-power | Power Reduction | NO | No
-iuc | Use synthesis Constraints File | NO | No
-keep_hierarchy | Keep Hierarchy | No | No
-netlist_hierarchy | Netlist Hierarchy | As_Optimized | As_Optimized
-rtlview | Generate RTL Schematic | Yes | No
-glob_opt | Global Optimization Goal | AllClockNets | AllClockNets
-read_cores | Read Cores | YES | Yes
-write_timing_constraints | Write Timing Constraints | NO | No
-cross_clock_analysis | Cross Clock Analysis | NO | No
-bus_delimiter | Bus Delimiter | <> | <>
-slice_utilization_ratio | Slice Utilization Ratio | 100 | 100
-bram_utilization_ratio | BRAM Utilization Ratio | 100 | 100
-dsp_utilization_ratio | DSP Utilization Ratio | 100 | 100
-reduce_control_sets |  | Auto | Auto
-fsm_extract |  | YES | Yes
-fsm_encoding |  | Auto | Auto
-safe_implementation |  | No | No
-fsm_style |  | LUT | LUT
-ram_extract |  | Yes | Yes
-ram_style |  | Auto | Auto
-rom_extract |  | Yes | Yes
-shreg_extract |  | YES | Yes
-rom_style |  | Auto | Auto
-auto_bram_packing |  | NO | No
-resource_sharing |  | YES | Yes
-async_to_sync |  | NO | No
-use_dsp48 |  | Auto | Auto
-iobuf |  | YES | Yes
-max_fanout |  | 100000 | 100000
-bufg |  | 32 | 32
-register_duplication |  | YES | Yes
-register_balancing |  | No | No
-optimize_primitives |  | NO | No
-use_clock_enable |  | Auto | Auto
-use_sync_set |  | Auto | Auto
-use_sync_reset |  | Auto | Auto
-iob |  | Auto | Auto
-equivalent_register_removal |  | YES | Yes
-slice_utilization_ratio_maxmargin |  | 5 | 0

Translation Property Settings
Switch Name | Property Name | Value | Default Value
-intstyle |  | ise | None
-dd |  | _ngo | None
-p |  | xc6vlx130t-ff1156-1 | None

Operating System Information
Operating System Information | xst | ngdbuild | map | par
CPU Architecture/Speed | Intel(R) Xeon(R) CPU W3505 @ 2.53GHz/2533.402 MHz | Intel(R) Xeon(R) CPU W3505 @ 2.53GHz/2533.402 MHz | < data not available > | < data not available >
Host | testsystem | testsystem | < data not available > | < data not available >
OS Name | unknown | unknown | < data not available > | < data not available >
OS Release | unknown | unknown | < data not available > | < data not available >