Commit da1a8bcd authored by John Robert Gill's avatar John Robert Gill

Revert dds sync validation delay - ad9910 suggests it should be 4 for 1 GHz sysclk.

parent c37894c9
......@@ -179,9 +179,9 @@ libwr2rf_dds_sync_calibrate (struct libwr2rf_dev *dev, int verbose)
if (sync_err[10][2] == 0) { // try to use preset
libwr2rf_dds_configure_sync(dev, 1, 10, 2);
libwr2rf_dds_configure_sync(dev, 1, 10, 4);
if (verbose)
printf("Using preset DDS Sync calibration delays (10, 2)\n");
printf("Using preset DDS Sync calibration delays (10, 4)\n");
} else {
// Find the best receiver delay
// Two windows are normally found. We want all our ad9910s to use the same window
......
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