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wr2rf-vme
Commits
9d687efc
Commit
9d687efc
authored
Jun 26, 2020
by
Dimitris Lampridis
Committed by
Tristan Gingold
Jun 29, 2020
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Plain Diff
Update timing I/O to reflect redesign of the schematic.
See also:
#17
parent
354da7c7
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1 changed file
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59 additions
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35 deletions
+59
-35
wr2rf_vme.xdc
hdl/syn/wr2rf_vme.xdc
+59
-35
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hdl/syn/wr2rf_vme.xdc
View file @
9d687efc
...
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@@ -203,13 +203,20 @@ set_property direction IN [get_ports {tmg_clk_i[1]}]
set_property direction IN [get_ports {tmg_clk_i[2]}]
set_property direction OUT [get_ports {tmg_clk_o[1]}]
set_property direction OUT [get_ports {tmg_clk_o[2]}]
set_property direction OUT [get_ports {tmg_clk_oen_o[1]}]
set_property direction OUT [get_ports {tmg_clk_oen_o[2]}]
set_property direction INOUT [get_ports {tmg_io_b[1]}]
set_property direction INOUT [get_ports {tmg_io_b[2]}]
set_property direction INOUT [get_ports {tmg_io_b[3]}]
set_property direction INOUT [get_ports {tmg_io_b[4]}]
set_property direction OUT [get_ports {tmg_io_dir_o}]
set_property direction OUT [get_ports {tmg_clk_oe_n_o[1]}]
set_property direction OUT [get_ports {tmg_clk_oe_n_o[2]}]
set_property direction IN [get_ports {tmg_io_i[1]}]
set_property direction IN [get_ports {tmg_io_i[2]}]
set_property direction IN [get_ports {tmg_io_i[3]}]
set_property direction IN [get_ports {tmg_io_i[4]}]
set_property direction OUT [get_ports {tmg_io_o[1]}]
set_property direction OUT [get_ports {tmg_io_o[2]}]
set_property direction OUT [get_ports {tmg_io_o[3]}]
set_property direction OUT [get_ports {tmg_io_o[4]}]
set_property direction OUT [get_ports {tmg_io_oe_n_o[1]}]
set_property direction OUT [get_ports {tmg_io_oe_n_o[2]}]
set_property direction OUT [get_ports {tmg_io_oe_n_o[3]}]
set_property direction OUT [get_ports {tmg_io_oe_n_o[4]}]
set_property direction OUT [get_ports {tmg_io_term_en_o[1]}]
set_property direction OUT [get_ports {tmg_io_term_en_o[2]}]
set_property direction OUT [get_ports {tmg_io_term_en_o[3]}]
...
...
@@ -472,13 +479,16 @@ set_property OFFCHIP_TERM NONE [get_ports spi_flash_cs_n_o]
set_property OFFCHIP_TERM NONE [get_ports spi_flash_mosi_o]
set_property OFFCHIP_TERM NONE [get_ports tmg_clk_o[1]]
set_property OFFCHIP_TERM NONE [get_ports tmg_clk_o[2]]
set_property OFFCHIP_TERM NONE [get_ports tmg_clk_oen_o[1]]
set_property OFFCHIP_TERM NONE [get_ports tmg_clk_oen_o[2]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_b[1]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_b[2]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_b[3]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_b[4]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_dir_o]
set_property OFFCHIP_TERM NONE [get_ports tmg_clk_oe_n_o[1]]
set_property OFFCHIP_TERM NONE [get_ports tmg_clk_oe_n_o[2]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_o[1]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_o[2]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_o[3]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_o[4]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_oe_n_o[1]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_oe_n_o[2]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_oe_n_o[3]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_oe_n_o[4]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_term_en_o[1]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_term_en_o[2]]
set_property OFFCHIP_TERM NONE [get_ports tmg_io_term_en_o[3]]
...
...
@@ -966,13 +976,20 @@ set_property IOSTANDARD LVCMOS33 [get_ports {tmg_clk_i[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_clk_i[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_clk_o[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_clk_o[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_clk_oen_o[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_clk_oen_o[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_b[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_b[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_b[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_b[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports tmg_io_dir_o]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_clk_oe_n_o[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_clk_oe_n_o[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_i[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_i[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_i[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_i[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_o[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_o[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_o[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_o[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports tmg_io_oe_n_o[1]]
set_property IOSTANDARD LVCMOS33 [get_ports tmg_io_oe_n_o[2]]
set_property IOSTANDARD LVCMOS33 [get_ports tmg_io_oe_n_o[3]]
set_property IOSTANDARD LVCMOS33 [get_ports tmg_io_oe_n_o[4]]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_term_en_o[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_term_en_o[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {tmg_io_term_en_o[3]}]
...
...
@@ -1018,13 +1035,13 @@ set_property PACKAGE_PIN J13 [get_ports sfp2_tx_fault_i]
set_property PACKAGE_PIN E18 [get_ports clk_sys_62m5_p_i]
set_property PACKAGE_PIN D18 [get_ports clk_sys_62m5_n_i]
set_property PACKAGE_PIN M16 [get_ports wr_onewire_b]
set_property PACKAGE_PIN
B15
[get_ports pll_main_cs_n_o]
set_property PACKAGE_PIN
A15
[get_ports pll_main_sclk_o]
set_property PACKAGE_PIN J1
4
[get_ports pll_main_sdi_o]
set_property PACKAGE_PIN
B1
0 [get_ports pll_main_sdo_i]
set_property PACKAGE_PIN
A12
[get_ports {pll_main_stat_i[1]}]
set_property PACKAGE_PIN
A13
[get_ports {pll_main_stat_i[2]}]
set_property PACKAGE_PIN
A10
[get_ports pll_main_sync_o]
set_property PACKAGE_PIN
G20
[get_ports pll_main_cs_n_o]
set_property PACKAGE_PIN
K20
[get_ports pll_main_sclk_o]
set_property PACKAGE_PIN J1
9
[get_ports pll_main_sdi_o]
set_property PACKAGE_PIN
E2
0 [get_ports pll_main_sdo_i]
set_property PACKAGE_PIN
J18
[get_ports {pll_main_stat_i[1]}]
set_property PACKAGE_PIN
J20
[get_ports {pll_main_stat_i[2]}]
set_property PACKAGE_PIN
H19
[get_ports pll_main_sync_o]
set_property IOSTANDARD LVCMOS33 [get_ports pps_i]
set_property IOSTANDARD LVCMOS33 [get_ports pps_o]
set_property DRIVE 12 [get_ports pps_o]
...
...
@@ -1080,13 +1097,20 @@ set_property PACKAGE_PIN B9 [get_ports sfp1_led_active_o]
set_property PACKAGE_PIN D11 [get_ports {tmg_clk_o[1]}]
set_property PACKAGE_PIN E11 [get_ports {tmg_clk_o[2]}]
set_property PACKAGE_PIN F12 [get_ports {tmg_clk_oen_o[1]}]
set_property PACKAGE_PIN G12 [get_ports {tmg_clk_oen_o[2]}]
set_property PACKAGE_PIN C14 [get_ports tmg_io_dir_o]
set_property PACKAGE_PIN E12 [get_ports {tmg_io_b[1]}]
set_property PACKAGE_PIN E13 [get_ports {tmg_io_b[2]}]
set_property PACKAGE_PIN D13 [get_ports {tmg_io_b[3]}]
set_property PACKAGE_PIN D14 [get_ports {tmg_io_b[4]}]
set_property PACKAGE_PIN F12 [get_ports {tmg_clk_oe_n_o[1]}]
set_property PACKAGE_PIN G12 [get_ports {tmg_clk_oe_n_o[2]}]
set_property PACKAGE_PIN B15 [get_ports tmg_io_oe_n_o[1]]
set_property PACKAGE_PIN A10 [get_ports tmg_io_oe_n_o[2]]
set_property PACKAGE_PIN B10 [get_ports tmg_io_oe_n_o[3]]
set_property PACKAGE_PIN A14 [get_ports tmg_io_oe_n_o[4]]
set_property PACKAGE_PIN E12 [get_ports {tmg_io_o[1]}]
set_property PACKAGE_PIN E13 [get_ports {tmg_io_o[2]}]
set_property PACKAGE_PIN D13 [get_ports {tmg_io_o[3]}]
set_property PACKAGE_PIN D14 [get_ports {tmg_io_o[4]}]
set_property PACKAGE_PIN J14 [get_ports {tmg_io_i[1]}]
set_property PACKAGE_PIN A12 [get_ports {tmg_io_i[2]}]
set_property PACKAGE_PIN A13 [get_ports {tmg_io_i[3]}]
set_property PACKAGE_PIN A15 [get_ports {tmg_io_i[4]}]
set_property PACKAGE_PIN B14 [get_ports {tmg_io_term_en_o[1]}]
set_property PACKAGE_PIN B11 [get_ports {tmg_io_term_en_o[2]}]
set_property PACKAGE_PIN B12 [get_ports {tmg_io_term_en_o[3]}]
...
...
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