Commit 1004da9f authored by Tristan Gingold's avatar Tristan Gingold

Add RF identification block.

Memory map heavily modified.
parent d4a70591
......@@ -25,3 +25,6 @@
[submodule "dependencies/nonIQModInterp2FIR"]
path = dependencies/nonIQModInterp2FIR
url = https://gitlab.cern.ch/jgill/nonIQModInterp2FIR.git
[submodule "dependencies/stdinfo"]
path = dependencies/stdinfo
url = ssh://git@gitlab.cern.ch:7999/BE-RF-PLDesign/memorymaps/stdinfo.git
stdinfo @ 99f6a35c
Subproject commit 99f6a35c68553589b6157fb918313b51495ecdc9
-- Do not edit. Generated on Wed Jan 20 11:51:47 2021 by jgill
-- Do not edit. Generated on Mon Jan 25 17:15:07 2021 by tgingold
-- With Cheby 1.4.dev0 and these options:
-- -i trigunit_regs.cheby --gen-hdl trigunit_regs.vhd
......@@ -564,7 +564,7 @@ begin
end process;
-- Process for read requests.
process (adr_int, rd_req_int, status_wrongWvalue_i, status_wrongHTvalue_i, status_wrongBvalue_i, status_running_i, status_startReady_i, status_missReady_i, status_missValid_i, configOffline_valid_i, configOffline_htSwitchingEnable_reg, configOffline_mode_reg, bValueOffline_reg, htValueOffline_reg, wValueOffline_reg, configOnline_htSwitchingEnable_i, configOnline_mode_i, bValueOnline_i, htValueOnline_i, wValueOnline_i, syncIDelay_delay_i, trigODelay_delay_i, trigdiag_control_window_reg, trigdiag_control_enable_reg, trigdiag_generation_i, trigdiag_freq_i, trigdiag_counter_i) begin
process (adr_int, rd_req_int, status_wrongWvalue_i, status_wrongHTvalue_i, status_wrongBvalue_i, status_running_i, status_startReady_i, status_missReady_i, status_missValid_i, control_vtuReset_reg, configOffline_valid_i, configOffline_htSwitchingEnable_reg, configOffline_mode_reg, bValueOffline_reg, htValueOffline_reg, wValueOffline_reg, configOnline_htSwitchingEnable_i, configOnline_mode_i, bValueOnline_i, htValueOnline_i, wValueOnline_i, syncIDelay_delay_i, trigODelay_delay_i, trigdiag_control_window_reg, trigdiag_control_enable_reg, trigdiag_generation_i, trigdiag_freq_i, trigdiag_counter_i) begin
-- By default ack read requests
rd_dat_d0 <= (others => 'X');
case adr_int(6 downto 3) is
......@@ -585,6 +585,10 @@ begin
when "01" =>
-- Reg control
rd_ack_d0 <= rd_req_int;
rd_dat_d0(0) <= '0';
rd_dat_d0(1) <= '0';
rd_dat_d0(2) <= control_vtuReset_reg;
rd_dat_d0(15 downto 3) <= (others => '0');
when "10" =>
-- Reg configOffline
rd_ack_d0 <= rd_req_int;
......
-- Do not edit. Generated on Wed Jan 20 11:51:48 2021 by jgill
-- Do not edit. Generated on Mon Jan 25 17:15:07 2021 by tgingold
-- With Cheby 1.4.dev0 and these options:
-- -i wr2rf_init_rf_regs.cheby --gen-hdl wr2rf_init_rf_regs.vhd
......
-- Do not edit. Generated on Wed Jan 20 11:51:48 2021 by jgill
-- Do not edit. Generated on Mon Jan 25 17:15:08 2021 by tgingold
-- With Cheby 1.4.dev0 and these options:
-- -i RFNCO.cheby --gen-hdl
......
-- Do not edit. Generated on Wed Jan 20 11:51:47 2021 by jgill
-- Do not edit. Generated on Mon Jan 25 17:15:07 2021 by tgingold
-- With Cheby 1.4.dev0 and these options:
-- -i wr2rf_rftrigger_regs.cheby --gen-hdl wr2rf_rftrigger_regs.vhd
......
......@@ -5,6 +5,11 @@ memory-map:
x-hdl:
busgroup: True
children:
- submap:
name: hwinfo
description: RF indentification
filename: ../../../dependencies/stdinfo/hwInfo.cheby
include: True
- submap:
name: ctrl
description: Memory map for the control part (edge compatible)
......
This diff is collapsed.
......@@ -290,6 +290,15 @@ begin
clk_i => clk_sys_i,
wb_i => wb_vme_i,
wb_o => wb_vme_o,
hwinfo_serialNumber_i => (others => '0'),
hwinfo_ident_jtagRemoteDisable_i => '1',
hwinfo_ident_extendedID_i => "0000000",
hwinfo_ident_cardID_i => x"56",
hwinfo_firmwareVersion_i => x"0001_00_00",
hwinfo_memMapVersion_i => x"0001_00_00",
hwinfo_echo_echo_o => open,
ctrl_rf1_vtus_i => wb_rf1_vtus_i,
ctrl_rf1_vtus_o => wb_rf1_vtus_o,
ctrl_rf2_vtus_i => wb_rf2_vtus_i,
......
......@@ -71,7 +71,7 @@ struct trigunit_regs {
/* [0x0]: REG (ro) VTU status */
uint16_t status;
/* [0x2]: REG (wo) Control signals */
/* [0x2]: REG (rw) Control signals */
uint16_t control;
/* [0x4]: REG (rw) The offline registers defines the values for the next start.
......
......@@ -3,24 +3,35 @@
#include "wr2rf_ctrl_regs.h"
#include "wr2rf_init_regs.h"
#define WR2RF_VME_REGS_SIZE 32768 /* 0x8000 = 32KB */
#include "hwInfo.h"
#define WR2RF_VME_REGS_SIZE 49152 /* 0xc000 = 48KB */
/* RF indentification */
#define WR2RF_VME_REGS_HWINFO 0x0UL
#define WR2RF_VME_REGS_HWINFO_SIZE 256 /* 0x100 */
/* Memory map for the control part (edge compatible) */
#define WR2RF_VME_REGS_CTRL 0x0UL
#define WR2RF_VME_REGS_CTRL 0x4000UL
#define WR2RF_VME_REGS_CTRL_SIZE 16384 /* 0x4000 = 16KB */
/* Memory map for the initialization part */
#define WR2RF_VME_REGS_INIT 0x4000UL
#define WR2RF_VME_REGS_INIT 0x8000UL
#define WR2RF_VME_REGS_INIT_SIZE 16384 /* 0x4000 = 16KB */
struct wr2rf_vme_regs {
/* [0x0]: SUBMAP Memory map for the control part (edge compatible) */
struct wr2rf_ctrl_regs ctrl;
/* [0x0]: SUBMAP RF indentification */
struct hwInfo hwinfo;
/* padding to: 4096 words */
uint32_t __padding_0[1012];
uint32_t __padding_0[4032];
/* [0x4000]: SUBMAP Memory map for the control part (edge compatible) */
struct wr2rf_ctrl_regs ctrl;
/* padding to: 8192 words */
uint32_t __padding_1[1012];
/* [0x4000]: SUBMAP Memory map for the initialization part */
/* [0x8000]: SUBMAP Memory map for the initialization part */
struct wr2rf_init_regs init;
};
......
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