/*
  Register definitions for slave core: Wishbone monitor port

  * File           : header.h
  * Author         : auto-generated by wbgen2 from Sysmon_wbslavev5.wb
  * Created        : Thu Oct 11 16:51:24 2012
  * Standard       : ANSI C

    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE Sysmon_wbslavev5.wb
    DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!

*/

#ifndef __WBGEN2_REGDEFS_SYSMON_WBSLAVEV5_WB
#define __WBGEN2_REGDEFS_SYSMON_WBSLAVEV5_WB

#include <inttypes.h>

#if defined( __GNUC__)
#define PACKED __attribute__ ((packed))
#else
#error "Unsupported compiler?"
#endif

#ifndef __WBGEN2_MACROS_DEFINED__
#define __WBGEN2_MACROS_DEFINED__
#define WBGEN2_GEN_MASK(offset, size) (((1<<(size))-1) << (offset))
#define WBGEN2_GEN_WRITE(value, offset, size) (((value) & ((1<<(size))-1)) << (offset))
#define WBGEN2_GEN_READ(reg, offset, size) (((reg) >> (offset)) & ((1<<(size))-1))
#define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
#endif


/* definitions for register: Temp register */

/* definitions for field: Reset bit in reg: Temp register */
#define WB2_SYSMON_TEMP_RESET                 WBGEN2_GEN_MASK(0, 1)

/* definitions for field: Actual Temp in reg: Temp register */
#define WB2_SYSMON_TEMP_ACT_MASK              WBGEN2_GEN_MASK(8, 8)
#define WB2_SYSMON_TEMP_ACT_SHIFT             8
#define WB2_SYSMON_TEMP_ACT_W(value)          WBGEN2_GEN_WRITE(value, 8, 8)
#define WB2_SYSMON_TEMP_ACT_R(reg)            WBGEN2_GEN_READ(reg, 8, 8)

/* definitions for field: Max Temp in reg: Temp register */
#define WB2_SYSMON_TEMP_MAX_MASK              WBGEN2_GEN_MASK(16, 8)
#define WB2_SYSMON_TEMP_MAX_SHIFT             16
#define WB2_SYSMON_TEMP_MAX_W(value)          WBGEN2_GEN_WRITE(value, 16, 8)
#define WB2_SYSMON_TEMP_MAX_R(reg)            WBGEN2_GEN_READ(reg, 16, 8)

/* definitions for field: Min Temp in reg: Temp register */
#define WB2_SYSMON_TEMP_MIN_MASK              WBGEN2_GEN_MASK(24, 8)
#define WB2_SYSMON_TEMP_MIN_SHIFT             24
#define WB2_SYSMON_TEMP_MIN_W(value)          WBGEN2_GEN_WRITE(value, 24, 8)
#define WB2_SYSMON_TEMP_MIN_R(reg)            WBGEN2_GEN_READ(reg, 24, 8)

/* definitions for register: Actual Voltage register */

/* definitions for field: Actual VccIN in reg: Actual Voltage register */
#define WB2_SYSMON_V_ACT_VCCIN_MASK           WBGEN2_GEN_MASK(0, 16)
#define WB2_SYSMON_V_ACT_VCCIN_SHIFT          0
#define WB2_SYSMON_V_ACT_VCCIN_W(value)       WBGEN2_GEN_WRITE(value, 0, 16)
#define WB2_SYSMON_V_ACT_VCCIN_R(reg)         WBGEN2_GEN_READ(reg, 0, 16)

/* definitions for field: Actual VccAux in reg: Actual Voltage register */
#define WB2_SYSMON_V_ACT_VCCAUX_MASK          WBGEN2_GEN_MASK(16, 16)
#define WB2_SYSMON_V_ACT_VCCAUX_SHIFT         16
#define WB2_SYSMON_V_ACT_VCCAUX_W(value)      WBGEN2_GEN_WRITE(value, 16, 16)
#define WB2_SYSMON_V_ACT_VCCAUX_R(reg)        WBGEN2_GEN_READ(reg, 16, 16)

/* definitions for register: Max. Voltage register */

/* definitions for field: Maximum VccIN in reg: Max. Voltage register */
#define WB2_SYSMON_V_MAX_VCCIN_MASK           WBGEN2_GEN_MASK(0, 16)
#define WB2_SYSMON_V_MAX_VCCIN_SHIFT          0
#define WB2_SYSMON_V_MAX_VCCIN_W(value)       WBGEN2_GEN_WRITE(value, 0, 16)
#define WB2_SYSMON_V_MAX_VCCIN_R(reg)         WBGEN2_GEN_READ(reg, 0, 16)

/* definitions for field: Maximum VccAux in reg: Max. Voltage register */
#define WB2_SYSMON_V_MAX_VCCAUX_MASK          WBGEN2_GEN_MASK(16, 16)
#define WB2_SYSMON_V_MAX_VCCAUX_SHIFT         16
#define WB2_SYSMON_V_MAX_VCCAUX_W(value)      WBGEN2_GEN_WRITE(value, 16, 16)
#define WB2_SYSMON_V_MAX_VCCAUX_R(reg)        WBGEN2_GEN_READ(reg, 16, 16)

/* definitions for register: Min. Voltage register */

/* definitions for field: Minimum VccIN in reg: Min. Voltage register */
#define WB2_SYSMON_V_MIN_VCCIN_MASK           WBGEN2_GEN_MASK(0, 16)
#define WB2_SYSMON_V_MIN_VCCIN_SHIFT          0
#define WB2_SYSMON_V_MIN_VCCIN_W(value)       WBGEN2_GEN_WRITE(value, 0, 16)
#define WB2_SYSMON_V_MIN_VCCIN_R(reg)         WBGEN2_GEN_READ(reg, 0, 16)

/* definitions for field: Minimum VccAux in reg: Min. Voltage register */
#define WB2_SYSMON_V_MIN_VCCAUX_MASK          WBGEN2_GEN_MASK(16, 16)
#define WB2_SYSMON_V_MIN_VCCAUX_SHIFT         16
#define WB2_SYSMON_V_MIN_VCCAUX_W(value)      WBGEN2_GEN_WRITE(value, 16, 16)
#define WB2_SYSMON_V_MIN_VCCAUX_R(reg)        WBGEN2_GEN_READ(reg, 16, 16)

PACKED struct WB2_SYSMON_WB {
  /* [0x0]: REG Temp register */
  uint32_t TEMP;
  /* [0x4]: REG Actual Voltage register */
  uint32_t V_ACT;
  /* [0x8]: REG Max. Voltage register */
  uint32_t V_MAX;
  /* [0xc]: REG Min. Voltage register */
  uint32_t V_MIN;
};

#endif
