A minimum delay of 20s is applied to all port for the the RX
calibration. After a reboot, all ports will be UP at the same time if
the RX  calibration time is less than 20s.
The same mechanism is applied all the time the link is going up.

Disable the SFP TX before starting the TX calibration and enable it
again when all ports are TX calibrated

After a reboot, all ports a waiting few seconds to try to be UP at the
same time. This is done to avoid PPSi (BMCA) to change all the time its
port states

Dependency  on minirpc submodule has been removed and a folder minirpc
has been created to replace it with the original code. The git history
has not been kept.

With  the new version of HAL, rtud was exiting sometimes at startup
because it was not able to connect to the HAL's shared memory

This state has been added to avoid blocking the fsm too long. This was
the case with a sleep of 100ms. This value can now be increased without
influencing other ports.

- Export HAL generic fsm to libwr (based on Tom work)
- HAL bug fixes and state machines changes

This version of HAL works but need some improvements

In the state machine, returns to START state if the link is going down
in RESET_PCS state.

In the RX setup state machine, the earlyLinkUp timeout must be restarted
every time we enter in the START state for the first time.

The time-out was set before to 10ms to accelerate the TX and RX
calibration process. After making some measures, it appears that it does
affect the calibration time.

This new state is used by PPSi the end of the initialization of all
ports before starting to change the timing mode. This is particularly
the case for the GM mode which is set during the initialization of PPSi.

- HAL shared memory modified to hide and remove some dependencies not
needed by PPSi
- LPDC structures are now stored in HAL shared memory. They are then
accessible by the share memory dump tool
- Improve the initialization procedure

Tollerance replaced by tolerance.

_hal_port_tx_setup_state_wait_other_ports() was not returning a value.

The writing must be done by the first LPDC-supporting port after all
the LPDC-supporting ports have been calibrated. Thus, this must be
done in the new state HAL_PORT_TX_SETUP_STATE_WAIT_OTHER_PORTS and
only the first port. Otherwise, we have problem when looping through
all the supporting ports. In particular, the writing must be done for
all LPDC-supporting ports, if we start looping on port N (by ++pointer),
then we will not cover all ports, unless we loop up (++) and (--)
down.

- point on all ports (with and without LPDC support) to the global
  LPDC structure, this is so that all ports can see whether the LPDC
  ports were all calibrated
- add new state to tx_setup FSM in which ports wait for all the
  LPDC-supported ports to finish calibration

All ports (with and without support) need to wait for LPDC calibartion
to finish because otherwise one of them could become slave and
change the timing_mode while LPDC requires the switch to be in
free-running master mode

- use new version of mini-rpc (less overhead on RT communication polling)
- adjust DMTD averaging interval (shorter for calibration -> speedup)
- make sure the PLL works in freemaster mode before starting calibration
- release control over ports to HAL only after all ports have finished the TX path calibration

After unplugging fiber, the early_link_up flag is cleared a bit later
than the detection of link_down happens. This resulted in the tx_setup
state machine trying to calibrate unplugged link. The things worked
because the FSM would hang in wait_lock state and then timeout. Yet,
this did not seem the best solution. So, I added timeout to wait
for the early_link_up bit to be cleared

If there were more ports connected than just slave port, unplugging any
of the ports would result (on BC) the timing_mode to be changed to
FREE_MASTER. As a consquence, the port in slave state was reseted and
would re-establishs sync. It was fixed by checking whether the unplugged
port was slave (i.e. was locked)