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White Rabbit Switch - Software
Commit ed532573 authored by Maciej Lipinski's avatar Maciej Lipinski
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HAL: Implementation of Low Phase Drift Calibration (from Tom's commits) 

This is a hand-based squash+merge+clean of the Low Phase Drift
Calibration implemetned in HAL by Tom (based on branch
tom-v6-determinism-5.0.1). Tom's branch is based on release version
of wr-switch-sw that has been grately modified. Therefore, it
was not easy to just merge.

In principle, this commit includes Tom's code copy+pasted, as much
as was possible. In some places, I made "TODO-ML:" comments. These
places will be modified later with separate commits. This was
done to make the changes somehow clean and logical
- first Tom's code in this commit
- then further improvements in separate commits
parent 647187c9
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Showing with 772 additions and 15 deletions
userspace/libwr/include/libwr/config-lpcalib.h
View file @ ed532573
......@@ -12,6 +12,6 @@ struct config_file *cfg_load(const char *filename, int overwrite);
int cfg_set_int(struct config_file *cfg, const char *key, int value);
int cfg_save(struct config_file *cfg, const char *filename);
void cfg_free(struct config_file *cfg);
void cfg_close(struct config_file *cfg);
#endif /* __LIBWR_CONFIG2_H__ */
userspace/libwr/include/libwr/hal_shmem.h
View file @ ed532573
......@@ -12,6 +12,23 @@
#define HAL_PORT_STATE_CALIBRATION 3
#define HAL_PORT_STATE_LOCKING 4
#define HAL_PORT_STATE_RESET 5
#define HAL_PORT_STATE_INIT 6
/* Port tx setup/calib machine states (hal_port_tx_setup_state) */
#define TX_SETUP_STATE_START 0
#define TX_SETUP_STATE_RESET_PCS 1
#define TX_SETUP_STATE_WAIT_LOCK 2
#define TX_SETUP_STATE_MEASURE_PHASE 3
#define TX_SETUP_DONE 4
#define TX_SETUP_VALIDATE 5
/* Port rx setup/calib machine states (hal_port_tx_setup_state) */
#define RX_SETUP_STATE_INIT 0
#define RX_SETUP_STATE_RESET_PCS 1
#define RX_SETUP_STATE_WAIT_LOCK 2
#define RX_SETUP_STATE_MEASURE_PHASE 3
#define RX_SETUP_DONE 4
#define RX_SETUP_VALIDATE 5
/* Read temperature from SFPs */
#define READ_SFP_DIAG_ENABLE 1
......@@ -24,6 +41,10 @@
#define DEFAULT_T2_PHASE_TRANS 0
#define DEFAULT_T4_PHASE_TRANS 0
/* Low Phase Drift Calibration for tx and rx */
struct hal_port_tx_setup_state;
struct hal_port_rx_setup_state;
/* Port delay calibration parameters */
typedef struct hal_port_calibration {
......@@ -122,6 +143,9 @@ struct hal_port_state {
int synchronized; // <>0 if port is synchronized
int portInfoUpdated; // Set to 1 when updated
/* needed for the Low Phase Drift Calibration */
struct hal_port_tx_setup_state *tx_setup_fsm;
struct hal_port_rx_setup_state *rx_setup_fsm;
};
struct hal_temp_sensors {
......@@ -132,8 +156,7 @@ struct hal_temp_sensors {
};
/* This is the overall structure stored in shared memory */
#define HAL_SHMEM_VERSION 12 /* Version 12, added monitor to
struct hal_port_state */
#define HAL_SHMEM_VERSION 13 /* Version 13, added Low Phase Drift Calib */
struct hal_shmem_header {
int nports;
......
userspace/libwr/include/libwr/sfp_lib.h
View file @ ed532573
......@@ -5,7 +5,8 @@
#define SFP_LED_WRMODE_SLAVE (1) /* green */
#define SFP_LED_WRMODE_OTHER (2) /* orange */
#define SFP_LED_WRMODE_MASTER (3) /* yellow */
#define SFP_LED_WRMODE_OFF (4) /* to off entire WRMODE LED */
#define SFP_LED_WRMODE_NO_LINK (4) /* to off entire WRMODE LED */
#define SFP_LED_WRMODE_CALIBRATING (1) /* green-blinking */
#define SFP_LED_WRMODE1 (1 << 0)
#define SFP_LED_WRMODE2 (1 << 1)
#define SFP_LED_SYNCED (1 << 2)
......
ppsi @ e72b21c9
Subproject commit 13e4a0cfda3f368cb63edf5834fdd145a2f8a2d4
Subproject commit e72b21c976f6d25d9e1cc1ba592bb737ac3b4eed
userspace/wrsw_hal/driver_stuff.h
View file @ ed532573
......@@ -9,3 +9,28 @@
#define NIC_WRITE_PHY_CMD(addr, value) ((((addr) & 0xff) << 16) \
| (1 << 31) \
| ((value) & 0xffff))
/*
* MDIO registers used in Low Phase Drift Calibration
* See kernel/wbgen-regs/endpoint-mdio.h
*/
// address of status and control registers
#define MDIO_LPC_STAT 18
#define MDIO_LPC_CTRL 19
// flags for status and control registers
#define MDIO_LPC_STAT_RESET_TX_DONE (1 << 0)
#define MDIO_LPC_STAT_LINK_UP (1 << 1)
#define MDIO_LPC_STAT_LINK_ALIGNED (1 << 2)
#define MDIO_LPC_STAT_RESET_RX_DONE (1 << 3)
#define MDIO_LPC_CTRL_RESET_TX (1 << 0)
#define MDIO_LPC_CTRL_TX_ENABLE (1 << 1)
#define MDIO_LPC_CTRL_RX_ENABLE (1 << 2)
#define MDIO_LPC_CTRL_RESET_RX (1 << 3)
#define MDIO_LPC_CTRL_DMTD_SOURCE_TXOUTCLK (1 << 14)
#define MDIO_LPC_CTRL_DMTD_SOURCE_RXRECCLK (0 << 14)
userspace/wrsw_hal/hal_ports.c
View file @ ed532573
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