Commit a5d39d59 authored by Federico Vaga's avatar Federico Vaga Committed by Adam Wujek

patches:kernel: remove v2.6.39 patches

Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent d2e35c03
From 95648bc0194a8a284b87b5555314f53e166a46f9 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Wed, 14 Sep 2011 11:23:29 +0200
Subject: [PATCH] wrs3 changes to g45ek
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 36 +++++++++++++++++++++++++++++++
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 6c999db..d0e1e67 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -420,6 +420,42 @@ static void __init ek_board_init(void)
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
+
+ { /* Configure the EBI1 pins for the wr switch */
+ int i;
+
+ /* PC16..31: periphA as EBI1_D16..31 */
+ for (i = AT91_PIN_PC16; i <= AT91_PIN_PC31; i++)
+ at91_set_A_periph(i, 0);
+ /* PC2 and PC3 too: EBI1_A19 EBI1_A20 */
+ at91_set_A_periph(AT91_PIN_PC2, 0);
+ at91_set_A_periph(AT91_PIN_PC3, 0);
+
+ /* FIXME: We should pull rst high for when it is programmed */
+
+ /* Then, write the EBI1 configuration (NCS0 == 0x1000.0000) */
+ at91_sys_write(AT91_SMC_SETUP(0),
+ AT91_SMC_NWESETUP_(4) |
+ AT91_SMC_NCS_WRSETUP_(2) |
+ AT91_SMC_NRDSETUP_(4) |
+ AT91_SMC_NCS_RDSETUP_(2));
+ at91_sys_write(AT91_SMC_PULSE(0),
+ AT91_SMC_NWEPULSE_(30) |
+ AT91_SMC_NCS_WRPULSE_(34) |
+ AT91_SMC_NRDPULSE_(30) |
+ AT91_SMC_NCS_RDPULSE_(34));
+ at91_sys_write(AT91_SMC_CYCLE(0),
+ AT91_SMC_NWECYCLE_(40) |
+ AT91_SMC_NRDCYCLE_(40));
+ at91_sys_write(AT91_SMC_MODE(0),
+ AT91_SMC_DBW_32 |
+ AT91_SMC_TDF_(0) |
+ AT91_SMC_READMODE |
+ AT91_SMC_WRITEMODE);
+
+
+ }
+
}
MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
--
1.7.0.4
From 4e4080233a2843d405a8c0574209a8245baa7de5 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Sat, 20 Nov 2010 13:15:48 +0100
Subject: [PATCH] initramfs: stop after one cpio archive
---
init/initramfs.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/init/initramfs.c b/init/initramfs.c
index 4b9c202..9b446ff 100644
--- a/init/initramfs.c
+++ b/init/initramfs.c
@@ -461,6 +461,7 @@ static char * __init unpack_to_rootfs(char *buf, unsigned len)
error("junk in compressed archive");
if (state != Reset)
error("junk in compressed archive");
+ break; /* so we can use a bigger initrd size in the cmdline */
this_header = saved_offset + my_inptr;
buf += my_inptr;
len -= my_inptr;
--
1.5.6.5
From 282dc8c6f8082ce6ce249363a5a1cc80a047c01a Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 17 Jan 2012 17:16:20 +0100
Subject: [PATCH 3/3] at91 NR_IRQS: increase by 64 to fit custom muxes
---
arch/arm/mach-at91/include/mach/irqs.h | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
index 36bd55f..04a080c 100644
--- a/arch/arm/mach-at91/include/mach/irqs.h
+++ b/arch/arm/mach-at91/include/mach/irqs.h
@@ -40,7 +40,11 @@
* symbols in gpio.h for ones handled indirectly as GPIOs.
* We make provision for 5 banks of GPIO.
*/
-#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
+#if 0
+ #define NR_IRQS (NR_AIC_IRQS + (5 * 32))
+#else /* Actually, we want to allow a pair of board-specific multiplexers */
+ #define NR_IRQS (NR_AIC_IRQS + (5 * 32) + (2 * 32))
+#endif
/* FIQ is AIC source 0. */
#define FIQ_START AT91_ID_FIQ
--
1.7.7.2
From 5a7166ccf11ae171cfd305d1b771035c4ccf2c20 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 17 Jan 2012 17:48:50 +0100
Subject: [PATCH 4/4] irq: export symbols for external irq controller
---
arch/arm/kernel/irq.c | 1 +
kernel/irq/chip.c | 1 +
kernel/irq/handle.c | 2 ++
kernel/irq/irqdesc.c | 2 ++
4 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 83bbad0..4a7f8aa 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -115,6 +115,7 @@ void set_irq_flags(unsigned int irq, unsigned int iflags)
/* Order is clear bits in "clr" then set bits in "set" */
irq_modify_status(irq, clr, set & ~clr);
}
+EXPORT_SYMBOL_GPL(set_irq_flags); /* for external irq controllers */
void __init init_IRQ(void)
{
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index 4af1e2b..ced43d9 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -587,6 +587,7 @@ irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
irq_set_chip(irq, chip);
__irq_set_handler(irq, handle, 0, name);
}
+EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
{
diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c
index 90cb55f..4d0421e 100644
--- a/kernel/irq/handle.c
+++ b/kernel/irq/handle.c
@@ -13,6 +13,7 @@
#include <linux/irq.h>
#include <linux/random.h>
#include <linux/sched.h>
+#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
@@ -33,6 +34,7 @@ void handle_bad_irq(unsigned int irq, struct irq_desc *desc)
kstat_incr_irqs_this_cpu(irq, desc);
ack_bad_irq(irq);
}
+EXPORT_SYMBOL_GPL(handle_bad_irq);
/*
* Special, empty irq handler:
diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c
index 2c039c9..d902ebf 100644
--- a/kernel/irq/irqdesc.c
+++ b/kernel/irq/irqdesc.c
@@ -110,6 +110,7 @@ struct irq_desc *irq_to_desc(unsigned int irq)
{
return radix_tree_lookup(&irq_desc_tree, irq);
}
+EXPORT_SYMBOL_GPL(irq_to_desc);
static void delete_irq_desc(unsigned int irq)
{
@@ -272,6 +273,7 @@ struct irq_desc *irq_to_desc(unsigned int irq)
{
return (irq < NR_IRQS) ? irq_desc + irq : NULL;
}
+EXPORT_SYMBOL_GPL(irq_to_desc);
static void free_desc(unsigned int irq)
{
--
1.7.7.2
From d77686b1021c98a971ff3aadb8269540bdb46dd2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tomasz=20W=C5=82ostowski?= <tomasz.wlostowski@cern.ch>
Date: Thu, 31 May 2012 13:26:20 +0200
Subject: [PATCH 5/8] Change Vbus pin
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index d0e1e67..8df2e47 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -81,7 +81,7 @@ static struct at91_usbh_data __initdata ek_usbh_hs_data = {
* USB HS Device port
*/
static struct usba_platform_data __initdata ek_usba_udc_data = {
- .vbus_pin = AT91_PIN_PB19,
+ .vbus_pin = AT91_PIN_PB8,
};
--
1.7.7.2
From 4815f7ca121792b349d780fe099d1352329a1177 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@unipv.it>
Date: Wed, 27 May 2009 00:44:01 +0200
Subject: [PATCH 6/7] arm fiq: allow modules to exploit the fiq mechanism
This patch exports "fiq_userptr" so that a module can hook to the fiq
handler. This mechanism is used by my "fiq-engine" external package
found in gnudd.com.
To prevent data aborts in vmalloc areas during fiq-mode, vmalloc.c is
modified to update the virtual memory of all processes in map_vm_area().
Without this patch such updates happen on demand, but page faults can't
be managed in fiq mode. Unfortunately, it's #fidef CONFIG_ARM in vmalloc.c
---
arch/arm/kernel/armksyms.c | 6 ++++++
arch/arm/kernel/entry-armv.S | 24 +++++++++++++++++++++++-
mm/vmalloc.c | 37 +++++++++++++++++++++++++++++++++++++
3 files changed, 66 insertions(+), 1 deletions(-)
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index acca35a..667e836 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -49,6 +49,12 @@ extern void __aeabi_ulcmp(void);
extern void fpundefinstr(void);
+/*
+ * for fiq support (code in entry-armv.S -- ARub)
+ */
+extern void (*fiq_userptr)(void);
+EXPORT_SYMBOL(fiq_userptr);
+
EXPORT_SYMBOL(__backtrace);
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index e8d8856..9a7b4c8 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -1178,9 +1178,31 @@ __stubs_start:
* other mode than FIQ... Ok you can switch to another mode, but you can't
* get out of that mode without clobbering one register.
*/
+/* ARub: try to use it instead (we won't leave FIQ mode anyway) */
vector_fiq:
- disable_fiq
+ ldr r9, 1f
+ ldr r9, [r9]
+ movs r9, r9
+ beq fiq_ret
+ mov r8, lr
+ mov lr, pc
+ mov pc, r9 /* jump to userptr */
+ mov lr, r8
+fiq_ret:
subs pc, lr, #4
+fiq_savemm:
+ .long 0
+
+
+
+1: .long fiq_userptr
+
+.section .text /* can't live here... */
+.globl fiq_userptr
+fiq_userptr:
+ .long 0 /* This must save r0..r8 inclusive */
+.previous
+
/*=============================================================================
* Address exception handler
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 5d60302..536c2d6 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -1258,6 +1258,43 @@ int map_vm_area(struct vm_struct *area, pgprot_t prot, struct page ***pages)
err = 0;
}
+/*
+ * In order to support installation of a non-trivial FIQ handler, on ARM
+ * we need to replicate kernel virtual memory to all processes (so it
+ * can be accessed from fiq state irrespective of what current process is).
+ * The code comes from do_translation_fault, and is arm-specific.
+ */
+#ifdef CONFIG_ARM
+ if (!err) {
+ struct task_struct *p;
+ for_each_process(p) {
+ task_lock(p);
+ if (!p->mm)
+ goto next_process;
+ if (p->mm == &init_mm)
+ goto next_process;
+ for (addr = (unsigned long)area->addr;
+ addr < end; addr += PAGE_SIZE) {
+ /* "+= PMD_SIZE" may be faster... */
+ unsigned int index;
+ pgd_t *pgd, *pgd_k;
+ pmd_t *pmd, *pmd_k;
+ /* from do_translation_fault() */
+ index = pgd_index(addr);
+ pgd = p->mm->pgd + index;
+ pgd_k = init_mm.pgd + index;
+ if (!pgd_present(*pgd))
+ set_pgd(pgd, *pgd_k);
+ pmd_k = pmd_offset(pgd_k, addr);
+ pmd = pmd_offset(pgd, addr);
+ copy_pmd(pmd, pmd_k);
+ }
+ next_process:
+ task_unlock(p);
+ }
+ }
+#endif
+
return err;
}
EXPORT_SYMBOL_GPL(map_vm_area);
--
1.7.7.2
From 424c448cb23511056074cda16f2e330a1f395e60 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Mon, 6 Aug 2012 12:00:27 +0200
Subject: [PATCH 7/7] mtd/nand: sam9g45 can hwecc like 9263
---
drivers/mtd/nand/Kconfig | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index edec457..06aaaa6 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -357,7 +357,7 @@ choice
config MTD_NAND_ATMEL_ECC_HW
bool "Hardware ECC"
- depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260 || AVR32
+ depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260 || AVR32 || ARCH_AT91SAM9G45
help
Use hardware ECC instead of software ECC when the chip
supports it.
--
1.7.7.2
From 111a2f978f9e3271ed9e0a62e391e9d81d393d62 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 7 Aug 2012 12:42:36 +0200
Subject: [PATCH 8/8] wrs3: use correct nand partitioning
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 21 ++++++++++++++++-----
1 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 8df2e47..d40aa3c 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -131,13 +131,24 @@ static struct at91_eth_data __initdata ek_macb_data = {
*/
static struct mtd_partition __initdata ek_nand_partition[] = {
{
- .name = "Partition 1",
- .offset = 0,
- .size = SZ_64M,
+ .name = "Kernel",
+ .offset = 1 << 20,
+ .size = SZ_8M,
},
{
- .name = "Partition 2",
- .offset = MTDPART_OFS_NXTBLK,
+ .name = "Filesystem", /* We _want_ this to be mtd1 */
+ .offset = 64 << 20,
+ .size = SZ_128M,
+ },
+ {
+ .name = "Barebox Environment",
+ .offset = 256 << 10,
+ .size = SZ_256K,
+ },
+ /* This is actuallywas MTDPART_OFS_APPEND over the filesystem */
+ {
+ .name = "Available",
+ .offset = (128+64) << 20,
.size = MTDPART_SIZ_FULL,
},
};
--
1.7.7.2
From 1402207cdb93a0f12ef5b544184c17b35d4ffd12 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Tue, 17 Jun 2014 10:47:30 +0200
Subject: [PATCH 9/9] at91 udc: force full speed
Some WRS speciments won't work correctly with automatic speed setup.
This patch forces full-speed on the device (instead of the
autodetected high-speed), and thus they work.
Speed is not a problem anyways, because it is just a serial port.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
---
drivers/usb/gadget/atmel_usba_udc.c | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index e7c65a4..bd6ccfb 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -1158,12 +1158,12 @@ static int do_test_mode(struct usba_udc *udc)
break;
case 0x0300:
/*
- * Test_SE0_NAK: Force high-speed mode and set up ep0
+ * Test_SE0_NAK: Force full-speed mode and set up ep0
* for Bulk IN transfers
*/
ep = &usba_ep[0];
usba_writel(udc, TST,
- USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
+ USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_FULL));
usba_ep_writel(ep, CFG,
USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
| USBA_EPT_DIR_IN
@@ -1832,6 +1832,9 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
toggle_bias(1);
usba_writel(udc, CTRL, USBA_ENABLE_MASK);
usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
+ /* Also, force full spedd or sometimes it won't work on WRS */
+ usba_writel(udc, TST,
+ USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_FULL));
}
spin_unlock_irqrestore(&udc->lock, flags);
--
1.7.7.2
From 76e58431485ad6b9d78eb0eec449c723dec1ecff Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Thu, 19 Jun 2014 11:42:41 +0200
Subject: [PATCH 10/10] sam9m10g45ek (for wrs): new partitioning
This moves environment to the first meg of nand so we can later ubify
the rest of the nand memory. Such placement if compatible with
current partitioning, which is unchanged.
Also, it prepare partitions in the dataflash, to reflect actual
placement of the stuff and ease replacing barebox or at91boot from a
running system (useful for me and Benoit for release work, nobody else
is expected to change dataflash).
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 46 +++++++++++++++++++++++++-----
1 files changed, 38 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index d40aa3c..afc6418 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -25,6 +25,7 @@
#include <linux/leds.h>
#include <linux/clk.h>
#include <linux/atmel-mci.h>
+#include <linux/spi/flash.h>
#include <mach/hardware.h>
#include <video/atmel_lcdc.h>
@@ -88,12 +89,42 @@ static struct usba_platform_data __initdata ek_usba_udc_data = {
/*
* SPI devices.
*/
+static struct mtd_partition wrs_df_parts[] = {
+ {
+ .name = "at91boot",
+ .offset = 0,
+ .size = 0x8400,
+ },
+ {
+ .name = "Barebox",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x84000,
+ },
+ {
+ .name = "Barebox-Environment",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x8400,
+ },
+ {
+ .name = "Available-dataflash",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct flash_platform_data wrs_df_pdata = {
+ .name = "wrs-dataflash",
+ .parts = wrs_df_parts,
+ .nr_parts = ARRAY_SIZE(wrs_df_parts),
+};
+
static struct spi_board_info ek_spi_devices[] = {
{ /* DataFlash chip */
.modalias = "mtd_dataflash",
.chip_select = 0,
.max_speed_hz = 15 * 1000 * 1000,
.bus_num = 0,
+ .platform_data = &wrs_df_pdata,
},
};
@@ -131,6 +162,11 @@ static struct at91_eth_data __initdata ek_macb_data = {
*/
static struct mtd_partition __initdata ek_nand_partition[] = {
{
+ .name = "Barebox-environment-backup",
+ .offset = 0,
+ .size = SZ_1M,
+ },
+ {
.name = "Kernel",
.offset = 1 << 20,
.size = SZ_8M,
@@ -141,14 +177,8 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
.size = SZ_128M,
},
{
- .name = "Barebox Environment",
- .offset = 256 << 10,
- .size = SZ_256K,
- },
- /* This is actuallywas MTDPART_OFS_APPEND over the filesystem */
- {
- .name = "Available",
- .offset = (128+64) << 20,
+ .name = "Available-nand",
+ .offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
--
1.7.7.2
From 382270adecef6b4950ecaa459c50ec725c2985b3 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Sat, 21 Jun 2014 08:48:04 +0200
Subject: [PATCH 11/12] sam9m10g45ek (for wrs): final partitions for V4.1
This changes the partitions in an incompatible way: then NAND
now has one partition for barebox environment (1M: 5 blocks to
protect against bad blocks) and one big partition fro UBI volumes.
Real stuff is then split in UBI volumes. Please see documentation
(in a later commit) for details.
And hwinfo is not read-only, as we need to change it sometimes.
Though rarely.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 18 +++++++-----------
1 files changed, 7 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index afc6418..6ad8462 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -26,6 +26,7 @@
#include <linux/clk.h>
#include <linux/atmel-mci.h>
#include <linux/spi/flash.h>
+#include <linux/mtd/mtd.h>
#include <mach/hardware.h>
#include <video/atmel_lcdc.h>
@@ -106,6 +107,11 @@ static struct mtd_partition wrs_df_parts[] = {
.size = 0x8400,
},
{
+ .name = "hwinfo",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x840,
+ },
+ {
.name = "Available-dataflash",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
@@ -167,18 +173,8 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
.size = SZ_1M,
},
{
- .name = "Kernel",
+ .name = "UBIfied-NAND",
.offset = 1 << 20,
- .size = SZ_8M,
- },
- {
- .name = "Filesystem", /* We _want_ this to be mtd1 */
- .offset = 64 << 20,
- .size = SZ_128M,
- },
- {
- .name = "Available-nand",
- .offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
--
1.7.7.2
From fe419a23b22d588864496bd38b42c96617a6fe6c Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Mon, 28 Jul 2014 15:20:59 +0200
Subject: [PATCH 12/12] sam9m10g45ek (for wrs): more relaxed nand timings
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
---
arch/arm/mach-at91/board-sam9m10g45ek.c | 14 +++++++-------
1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 2eb70d5..a6e5c67 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -194,21 +194,21 @@ static struct atmel_nand_data __initdata ek_nand_data = {
};
static struct sam9_smc_config __initdata ek_nand_smc_config = {
- .ncs_read_setup = 0,
- .nrd_setup = 2,
- .ncs_write_setup = 0,
- .nwe_setup = 2,
+ .ncs_read_setup = 2,
+ .nrd_setup = 4,
+ .ncs_write_setup = 2,
+ .nwe_setup = 4,
.ncs_read_pulse = 4,
.nrd_pulse = 4,
.ncs_write_pulse = 4,
.nwe_pulse = 4,
- .read_cycle = 7,
- .write_cycle = 7,
+ .read_cycle = 12,
+ .write_cycle = 12,
.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
- .tdf_cycles = 3,
+ .tdf_cycles = 4,
};
static void __init ek_add_device_nand(void)
--
1.7.7.2
From a19927112db5173ce8f93728672042070f38ebbb Mon Sep 17 00:00:00 2001
From: Benoit Rat <benoit@sevensols.com>
Date: Tue, 9 Sep 2014 19:08:11 +0200
Subject: [PATCH] mtd_dataflash: Read EDI bytes in JEDEC to support AT45DB641E
Standard JEDEC ID is only 24bits to identify a DF chip.
It also has an optional Extended Device Info (EDI) on bytes 4 and/or 5
that need to be read in order differentiate some DF chips. (i.e, the
difference between AT45DB641E and AT45DB642D is made by byte 4).
We have had two new fields in the struct flash_info:
* edi_nbytes: number of optional bytes to read (1 or 2)
* edi_jedec: EDI value for a given chip
---
drivers/mtd/devices/mtd_dataflash.c | 101 ++++++++++++++++++++++--------------
1 file changed, 62 insertions(+), 39 deletions(-)
diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c
index c5015cc..42588e3 100644
--- a/drivers/mtd/devices/mtd_dataflash.c
+++ b/drivers/mtd/devices/mtd_dataflash.c
@@ -735,6 +735,12 @@ struct flash_info {
uint16_t pageoffset;
uint16_t flags;
+
+ /* JEDEC has an optional Extended Device Info (EDI) on bytes
+ * 4 and/or 5 that need to be read to differentiate some DF chips
+ */
+ uint8_t edi_nbytes;
+ uint16_t edi_jedec;
#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
#define IS_POW2PS 0x0001 /* uses 2^N byte pages */
};
@@ -750,36 +756,40 @@ static struct flash_info __devinitdata dataflash_data [] = {
* These newer chips also support 128-byte security registers (with
* 64 bytes one-time-programmable) and software write-protection.
*/
- { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
- { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
+ { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS, 0, 0x0},
+ { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS, 0, 0x0},
- { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
- { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
+ { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS, 0, 0x0},
+ { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS, 0, 0x0},
- { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
- { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
+ { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS, 0, 0x0},
+ { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS, 0, 0x0},
- { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
- { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
+ { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS, 0, 0x0},
+ { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS, 0, 0x0},
- { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
- { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
+ { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS, 0, 0x0},
+ { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS, 0, 0x0},
- { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
+ { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0, 0, 0x0}, /* rev C */
- { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
- { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
+ { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS, 0, 0x0},
+ { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS, 0, 0x0},
- { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
- { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
+ { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS,1, 0x0},
+ { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS,1, 0x0},
+
+ { "AT45DB641E", 0x1f2800, 32768, 264, 9, SUP_POW2PS,1, 0x1},
+ { "at45db641e", 0x1f2800, 32768, 256, 8, SUP_POW2PS | IS_POW2PS,1, 0x1},
};
static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
{
int tmp;
uint8_t code = OP_READ_ID;
- uint8_t id[3];
+ uint8_t id[5];
uint32_t jedec;
+ uint16_t jedec_edi;
struct flash_info *info;
int status;
@@ -791,7 +801,7 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
* That's not an error; only rev C and newer chips handle it, and
* only Atmel sells these chips.
*/
- tmp = spi_write_then_read(spi, &code, 1, id, 3);
+ tmp = spi_write_then_read(spi, &code, 1, id, 5);
if (tmp < 0) {
DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
dev_name(&spi->dev), tmp);
@@ -805,33 +815,40 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
jedec |= id[1];
jedec = jedec << 8;
jedec |= id[2];
+
+ //EDI bytes to support newest chips
+ jedec_edi = id[3];
+ jedec_edi = jedec_edi << 8;
+ jedec_edi |= id[4];
for (tmp = 0, info = dataflash_data;
tmp < ARRAY_SIZE(dataflash_data);
tmp++, info++) {
if (info->jedec_id == jedec) {
- DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n",
- dev_name(&spi->dev),
- (info->flags & SUP_POW2PS)
- ? ", binary pagesize" : ""
- );
- if (info->flags & SUP_POW2PS) {
- status = dataflash_status(spi);
- if (status < 0) {
- DEBUG(MTD_DEBUG_LEVEL1,
- "%s: status error %d\n",
- dev_name(&spi->dev), status);
- return ERR_PTR(status);
- }
- if (status & 0x1) {
- if (info->flags & IS_POW2PS)
- return info;
- } else {
- if (!(info->flags & IS_POW2PS))
- return info;
- }
- } else
- return info;
+ if (info->edi_jedec == (jedec_edi >> (16-8*info->edi_nbytes))) {
+ DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n",
+ dev_name(&spi->dev),
+ (info->flags & SUP_POW2PS)
+ ? ", binary pagesize" : ""
+ );
+ if (info->flags & SUP_POW2PS) {
+ status = dataflash_status(spi);
+ if (status < 0) {
+ DEBUG(MTD_DEBUG_LEVEL1,
+ "%s: status error %d\n",
+ dev_name(&spi->dev), status);
+ return ERR_PTR(status);
+ }
+ if (status & 0x1) {
+ if (info->flags & IS_POW2PS)
+ return info;
+ } else {
+ if (!(info->flags & IS_POW2PS))
+ return info;
+ }
+ } else
+ return info;
+ }
}
}
@@ -857,6 +874,7 @@ static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
* AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
* AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
* AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
+ * AT45DB0641E 64Mbit (8M) xx111xxx (0x3c) 32768 264 9
*/
static int __devinit dataflash_probe(struct spi_device *spi)
{
@@ -871,6 +889,11 @@ static int __devinit dataflash_probe(struct spi_device *spi)
* write procedures.
*/
info = jedec_probe(spi);
+
+ printk("MTD: %s 0x%08x %d %d %d %x\n",
+ info->name,info->jedec_id,
+ info->nr_pages,info->pagesize,info->pageoffset,info->flags);
+
if (IS_ERR(info))
return PTR_ERR(info);
if (info != NULL)
--
1.9.1
From dd4abd9483cdb6bc31cba97763028770cabbfed0 Mon Sep 17 00:00:00 2001
From: Alessandro Rubini <rubini@gnudd.com>
Date: Fri, 28 Nov 2014 14:18:27 +0100
Subject: [PATCH 14/14] sam9m10g45ek (for wrs): provide bootcount using
scratch registers
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
---
arch/arm/kernel/process.c | 13 ++++
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/wrs-bootcount.c | 109 ++++++++++++++++++++++++++++++++++++
3 files changed, 123 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-at91/wrs-bootcount.c
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 5e1e541..720d1e1 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -93,6 +93,19 @@ __setup("hlt", hlt_setup);
void arm_machine_restart(char mode, const char *cmd)
{
+ uint32_t gpbr_val;
+ char *gpbr_str = (void *)&gpbr_val;
+ unsigned short *gpbr_short = (void *)&gpbr_val;
+
+ /* WRS: Change the static registers. See wrs-bootcount.c for details */
+ gpbr_val = at91_sys_read(AT91_GPBR);
+ gpbr_str[3] = 'R'; /* reboot requested by user */
+ at91_sys_write(AT91_GPBR, gpbr_val);
+
+ gpbr_val = at91_sys_read(AT91_GPBR + 4);
+ gpbr_short[1]++; /* count the user-requeted reboots */
+ at91_sys_write(AT91_GPBR + 4, gpbr_val);
+
/* Disable interrupts first */
local_irq_disable();
local_fiq_disable();
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index a83835e..f1db0b2 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -74,6 +74,7 @@ obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
# AT91SAM9G45 board-specific support
obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
+obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += wrs-bootcount.o
# AT91CAP9 board-specific support
obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o
diff --git a/arch/arm/mach-at91/wrs-bootcount.c b/arch/arm/mach-at91/wrs-bootcount.c
new file mode 100644
index 0000000..9088377
--- /dev/null
+++ b/arch/arm/mach-at91/wrs-bootcount.c
@@ -0,0 +1,109 @@
+/* Alessandro Rubini for CERN 2014 */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <asm/mach/map.h>
+
+#ifdef CONFIG_RTC_DRV_AT91SAM9
+#error "This is incompatible with CONFIG_RTC_DRV_AT91SAM9"
+#endif
+
+/* This structures is mapped over the general purpose registers */
+struct wrs_bc {
+ unsigned char magic[3];
+ unsigned char last_is_reboot;
+ unsigned short boot_count;
+ unsigned short reboot_count;
+ uint32_t fault_ip;
+ uint32_t fault_lr;
+};
+
+static struct wrs_bc __bc_soft, __bc_hard;
+
+/* bc_regs points there, bc_hw is a local tmp working copy, bc_sw is sw */
+static struct wrs_bc __iomem *bc_regs;
+static struct wrs_bc *bc_hw = &__bc_hard;
+static struct wrs_bc *bc_sw = &__bc_soft;
+
+/*
+ * For some reason, memcpy_fromio and toio is not working. The MSB
+ * is repeated 4 times in the resulting word. So do it by hand
+ */
+static void copy16_fromio(void *dest, void __iomem *src)
+{
+ uint32_t __iomem *s = src;
+ uint32_t *d = dest;
+ int i;
+ for (i = 0; i < 4; i++)
+ d[i] = __raw_readl(s + i);
+}
+
+static void copy16_toio(void __iomem *dest, void *src)
+{
+ uint32_t __iomem *d = dest;
+ uint32_t *s = src;
+ int i;
+ for (i = 0; i < 4; i++)
+ __raw_writel(s[i], d + i);
+}
+
+/* As soon as possible, copy stuff over */
+static int __init wrs_bc_early_init(void)
+{
+ bc_regs = (void __iomem *)AT91_VA_BASE_SYS + AT91_GPBR;
+ copy16_fromio(bc_hw, bc_regs);
+
+ if (strncmp(bc_hw->magic, "WRS", 3)) /* power on */
+ memset(bc_hw, 0, sizeof(*bc_hw));
+
+ strncpy(bc_hw->magic, "WRS", 3);
+ bc_hw->boot_count++;
+
+ /* save sw for printing, fix hw and copy back */
+ memcpy(bc_sw, bc_hw, sizeof(*bc_sw));
+ bc_hw->last_is_reboot = 'U';
+ bc_hw->fault_ip = bc_hw->fault_lr = 0;
+ copy16_toio(bc_regs, bc_hw);
+ return 0;
+}
+early_initcall(wrs_bc_early_init);
+
+/* Over time, export in proc */
+static int wrs_bc_proc_show(struct seq_file *m, void *v)
+{
+ seq_printf(m, "boot_count: %i\n"
+ "reboot_count: %i\n"
+ "last_is_reboot: %i\n"
+ "fault_ip: 0x%08x\n"
+ "fault_lr: 0x%08x\n",
+ bc_sw->boot_count,
+ bc_sw->reboot_count,
+ bc_sw->last_is_reboot == 'R',
+ bc_sw->fault_ip,
+ bc_sw->fault_lr);
+ return 0;
+}
+
+static int wrs_bc_proc_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, wrs_bc_proc_show, NULL);
+}
+
+static const struct file_operations wrs_bc_proc_fops = {
+ .open = wrs_bc_proc_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+static int __init proc_wrs_bc_init(void)
+{
+ /* two files use dash and two use underscore in /proc. Pick one */
+ proc_create("wrs-bootcount", 0, NULL, &wrs_bc_proc_fops);
+ return 0;
+}
+module_init(proc_wrs_bc_init);
--
1.7.7.2
From f5eb5f7891907414caccd1d82c7171bdfafe7900 Mon Sep 17 00:00:00 2001
From: Adam Wujek <adam.wujek@cern.ch>
Date: Wed, 18 May 2016 09:22:55 +0200
Subject: [PATCH] kernel: remove deprecated use of defined in
kernel/timeconst.pl
Fix the warning (for perl < 5.21.x) whihch becomes an error
(for perl >= 5.21.x):
defined(@array) is deprecated at kernel/timeconst.pl line 373.
(Maybe you should just omit the defined()?)
Signed-off-by: Adam Wujek <adam.wujek@cern.ch>
---
kernel/timeconst.pl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/timeconst.pl b/kernel/timeconst.pl
index eb51d76..0461239 100644
--- a/kernel/timeconst.pl
+++ b/kernel/timeconst.pl
@@ -370,7 +370,7 @@ if ($hz eq '--can') {
}
@val = @{$canned_values{$hz}};
- if (!defined(@val)) {
+ if (!@val) {
@val = compute_values($hz);
}
output($hz, @val);
--
1.9.1
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