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White Rabbit Switch - Software
Commit 487888ae authored by Alessandro Rubini's avatar Alessandro Rubini
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userspace/wrsw_hal: removed trailing blanks

parent dc1af753
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Showing with 148 additions and 148 deletions
userspace/wrsw_hal/hal_config.c
View file @ 487888ae
......@@ -27,12 +27,12 @@ int hal_config_extra_cmdline(const char *str)
int hal_parse_config()
{
TRACE(TRACE_INFO, "Parsing wrsw_hal configuration file: %s", HAL_CONFIG_FILE);
cfg_file = lua_open();
luaL_openlibs(cfg_file);
if (luaL_dofile(cfg_file, hal_config_file))
if (luaL_dofile(cfg_file, hal_config_file))
TRACE(TRACE_ERROR, "Error parsing the configuration file: %s", lua_tostring(cfg_file,-1));
luaL_dostring(cfg_file, "\
......@@ -54,17 +54,17 @@ static int global_get_var(const char *name)
{
lua_getglobal(cfg_file, "get_var");
lua_pushstring(cfg_file, name);
if(lua_pcall(cfg_file, 1, 1, 0) != 0)
if(lua_pcall(cfg_file, 1, 1, 0) != 0)
return -1;
return 0;
}
int hal_config_get_int(const char *name, int *value)
{
if(global_get_var(name) < 0)
if(global_get_var(name) < 0)
return -1;
if(!lua_isnumber(cfg_file, -1))
if(!lua_isnumber(cfg_file, -1))
return -1;
*value = (int)lua_tonumber(cfg_file, -1);
return 0;
......@@ -72,9 +72,9 @@ int hal_config_get_int(const char *name, int *value)
int hal_config_get_double(const char *name, double *value)
{
if(global_get_var(name) < 0)
if(global_get_var(name) < 0)
return -1;
if(!lua_isnumber(cfg_file, -1))
if(!lua_isnumber(cfg_file, -1))
return -1;
*value = (double)lua_tonumber(cfg_file, -1);
return 0;
......@@ -82,9 +82,9 @@ int hal_config_get_double(const char *name, double *value)
int hal_config_get_string(const char *name, char *value, int max_len)
{
if(global_get_var(name) < 0)
if(global_get_var(name) < 0)
return -1;
if(!lua_isstring(cfg_file, -1))
if(!lua_isstring(cfg_file, -1))
return -1;
strncpy(value, lua_tostring(cfg_file, -1), max_len);
return 0;
......@@ -93,13 +93,13 @@ int hal_config_get_string(const char *name, char *value, int max_len)
int hal_config_iterate(const char *section, int index, char *subsection, int max_len)
{
int i = 0;
if(global_get_var(section) < 0) return -1;
lua_pushnil(cfg_file); /* first key */
while (lua_next(cfg_file, -2) != 0) {
/* uses 'key' (at index -2) and 'value' (at index -1) */
char *key_type = lua_typename(cfg_file, lua_type(cfg_file, -1));
if(!strcmp(key_type, "table") && i == index)
{
......@@ -117,6 +117,6 @@ int hal_config_iterate(const char *section, int index, char *subsection, int max
/* removes 'value'; keeps 'key' for next iteration */
lua_pop(cfg_file, 1);
}
return 0;
}
userspace/wrsw_hal/hal_exports.c
View file @ 487888ae
......@@ -30,9 +30,9 @@ int halexp_reset_port(const char *port_name)
int halexp_lock_cmd(const char *port_name, int command, int priority)
{
int rval;
// TRACE(TRACE_INFO,"Command %d", command);
switch(command)
{
case HEXP_LOCK_CMD_START:
......@@ -40,7 +40,7 @@ int halexp_lock_cmd(const char *port_name, int command, int priority)
case HEXP_LOCK_CMD_CHECK:
rval = hal_port_check_lock(port_name);
if(rval > 0)
return HEXP_LOCK_STATUS_LOCKED;
else if (!rval)
......@@ -49,7 +49,7 @@ int halexp_lock_cmd(const char *port_name, int command, int priority)
return HEXP_LOCK_STATUS_NONE;
break;
}
return -100;
}
......@@ -95,7 +95,7 @@ int hal_init_wripc()
hal_ipc = wripc_create_server(WRSW_HAL_SERVER_ADDR);
if(hal_ipc < 0)
if(hal_ipc < 0)
return -1;
wripc_export(hal_ipc, T_INT32, "halexp_pps_cmd", halexp_pps_cmd, 2, T_INT32, T_STRUCT(hexp_pps_params_t));
......@@ -108,9 +108,9 @@ int hal_init_wripc()
hal_add_cleanup_callback(hal_cleanup_wripc);
TRACE(TRACE_INFO, "Started WRIPC server '%s'", WRSW_HAL_SERVER_ADDR);
return 0;
}
......@@ -125,12 +125,12 @@ int hal_check_running()
wripc_handle_t fd;
fd = wripc_connect(WRSW_HAL_SERVER_ADDR);
if(fd >= 0)
{
wripc_close(fd);
return 1;
}
return 0;
}
userspace/wrsw_hal/hal_exports.h
View file @ 487888ae
#ifndef __HAL_EXPORTS_H
#define __HAL_EXPORTS_H
#include <stdint.h>
#include <stdint.h>
#define HAL_MAX_PORTS 64
......@@ -40,7 +40,7 @@
#define HEXP_PPSG_CMD_GET 0
#define HEXP_PPSG_CMD_ADJUST_PHASE 1
#define HEXP_PPSG_CMD_ADJUST_UTC 2
#define HEXP_PPSG_CMD_ADJUST_UTC 2
#define HEXP_PPSG_CMD_ADJUST_NSEC 3
#define HEXP_PPSG_CMD_POLL 4
......@@ -63,10 +63,10 @@ typedef struct {
int64_t adjust_utc;
int32_t adjust_nsec;
uint64_t current_utc;
uint32_t current_nsec;
} hexp_pps_params_t;
/* Port modes (hexp_port_state_t.mode) */
......@@ -91,7 +91,7 @@ typedef struct {
/* TX and RX delays (combined, big Deltas from the link model in the spec) */
uint32_t delta_tx;
uint32_t delta_rx;
/* DDMTD raw phase value in picoseconds */
uint32_t phase_val;
......
userspace/wrsw_hal/hal_main.c
View file @ 487888ae
......@@ -29,14 +29,14 @@ int hal_add_cleanup_callback(hal_cleanup_callback_t cb)
cleanup_cb[i] = cb;
return 0;
}
return -1;
}
static void call_cleanup_cbs()
{
int i;
TRACE(TRACE_INFO, "Cleaning up...");
for(i=0;i<MAX_CLEANUP_CALLBACKS;i++)
if(cleanup_cb[i]) cleanup_cb[i]();
......@@ -47,19 +47,19 @@ int hal_setup_fpga_images()
{
char fpga_dir[128];
char fw_name[128];
if( hal_config_get_string("global.hal_firmware_path", fpga_dir, sizeof(fpga_dir)) < 0)
return -1;
// shw_fpga_force_firmware_reload();
shw_set_fpga_firmware_path(fpga_dir);
if( !hal_config_get_string("global.main_firmware", fw_name, sizeof(fw_name)))
shw_request_fpga_firmware(FPGA_ID_MAIN, fw_name);
if( !hal_config_get_string("global.clkb_firmware", fw_name, sizeof(fw_name)))
shw_request_fpga_firmware(FPGA_ID_CLKB, fw_name);
return 0;
}
......@@ -79,13 +79,13 @@ static int load_unload_kmod(const char *name, int load)
}
modules_path_valid = 1;
}
TRACE(TRACE_INFO, "%s kernel module '%s'", load ? "Loading" : "Unloading", name);
snprintf(cmd, sizeof(cmd), "%s %s/%s", load ? "/sbin/insmod" : "/sbin/rmmod", modules_path, name);
system(cmd);
return 0;
}
#define assert_init(proc) { int ret; if((ret = proc) < 0) return ret; }
......@@ -98,7 +98,7 @@ static void unload_kernel_modules()
for(;;)
{
if(!hal_config_iterate("global.modules", index++, module_name, sizeof(module_name)))
if(!hal_config_iterate("global.modules", index++, module_name, sizeof(module_name)))
break;
load_unload_kmod(module_name, 0);
......@@ -115,16 +115,16 @@ int hal_load_kernel_modules()
for(;;)
{
if(!hal_config_iterate("global.modules", index++, module_name, sizeof(module_name)))
if(!hal_config_iterate("global.modules", index++, module_name, sizeof(module_name)))
break;
assert_init(load_unload_kmod(module_name, 1));
}
hal_add_cleanup_callback(unload_kernel_modules);
return 0;
}
void sighandler(int sig)
......@@ -147,25 +147,25 @@ int hal_init()
trace_log_stderr();
TRACE(TRACE_INFO,"HAL initializing...");
memset(cleanup_cb, 0, sizeof(cleanup_cb));
signal(SIGSEGV, sighandler);
signal(SIGINT, sighandler);
signal(SIGTERM, sighandler);
signal(SIGILL, sighandler);
assert_init(hal_parse_config());
assert_init(hal_setup_fpga_images());
if(!hal_config_get_int("timing.use_external_clock", &enable))
shw_use_external_reference(enable);
assert_init(shw_init());
assert_init(hal_load_kernel_modules());
assert_init(hal_init_ports());
assert_init(hal_init_wripc());
return 0;
}
......@@ -173,7 +173,7 @@ void hal_update()
{
hal_update_wripc();
hal_update_ports();
usleep(1000);
}
......@@ -272,15 +272,15 @@ int main(int argc, char *argv[])
}
hal_parse_cmdline(argc, argv);
hal_init();
if(daemon_mode)
hal_deamonize();
for(;;) hal_update();
hal_shutdown();
return 0;
}
userspace/wrsw_hal/hal_ports.c
View file @ 487888ae
This diff is collapsed.
userspace/wrsw_hal/wrsw_hal.h
View file @ 487888ae
......@@ -13,30 +13,30 @@ typedef void (*hal_cleanup_callback_t)();
/* Port delay calibration parameters */
typedef struct {
/* PHY delay measurement parameters for PHYs which require external calibration (i.e. with
/* PHY delay measurement parameters for PHYs which require external calibration (i.e. with
the feedback network. */
/* minimum possible delay introduced by the PHY. Expressed as time
(in picoseconds) between the beginning of the symbol on the serial input
and the rising edge of the RX clock at which the deserialized word is
and the rising edge of the RX clock at which the deserialized word is
available at the parallel output of the PHY. */
uint32_t phy_rx_min;
/* RX delay range of the PHY, expressed as a difference (in picoseconds)
between the maximum and minimum possible RX delays. For example, a 1.25 Gbps
PHY with minimum delay of 8 UI and maximum delay of 12 UI will have
PHY with minimum delay of 8 UI and maximum delay of 12 UI will have
phy_rx_range equal to (12 - 8) * 800 ps = 3200 ps. Due to the nature of the
calibration method, the measurement range is limited to one parallel clock cycle,
i.e. 10 UIs, which is true for most 802.3z serdeses. PHYs which have bigger
i.e. 10 UIs, which is true for most 802.3z serdeses. PHYs which have bigger
delay variance can't be calibrated using this method. */
uint32_t phy_rx_range;
/* value of the phase shift (in picoseconds) measured by the calibrator DMTD
when the PHY has locked on the minimum possible delay. Used to "unwind" the phase
measurement into the PHY RX delay. This parameter must be determined experimentally. */
measurement into the PHY RX delay. This parameter must be determined experimentally. */
uint32_t phy_rx_bias;
/* the same set of parameters, but for the TX path of the PHY */
uint32_t phy_tx_bias;
uint32_t phy_tx_min;
......@@ -50,7 +50,7 @@ typedef struct {
uint32_t delta_tx_sfp;
uint32_t delta_rx_sfp;
/* Current board routing delays (between the DDMTD inputs to the PHY clock
/* Current board routing delays (between the DDMTD inputs to the PHY clock
inputs/outputs), in picoseconds */
uint32_t delta_tx_board;
uint32_t delta_rx_board;
......@@ -60,11 +60,11 @@ typedef struct {
/* Fiber "alpha" asymmetry coefficient, as defined in the WRPTP Specification */
double fiber_alpha;
/* Fixed point fiber asymmetry coefficient. Expressed as (2 ^ 40 * (fiber_alpha - 1)). */ int32_t fiber_fix_alpha;
/* When non-zero: RX path is calibrated (delta_*_rx contain valid values) */
int rx_calibrated;
int rx_calibrated;
/* When non-zero: TX path is calibrated */
int tx_calibrated;
......
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