Commit 30b94910 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk

add bitstream md5 to tx_phase_cal.conf file treatment

Load values from tx_phase_cal.conf file only if MD5 matches. Otherwise,
generate new values.
parent a3fca049
......@@ -175,6 +175,28 @@ int cfg_set_int(struct config_file *cfg, const char *key, int value)
return 1;
}
int cfg_set_str(struct config_file *cfg, const char *key, char *value)
{
struct key_value *kv = cfg_find_key(cfg, key, 1);
if (!kv)
return 0;
kv->value = strdup(value);
return 1;
}
int cfg_get_str(struct config_file *cfg, const char *key, char *value)
{
struct key_value *kv = cfg_find_key(cfg, key, 1);
if (!kv)
return 0;
strcpy(value, kv->value);
return 1;
}
int cfg_save(struct config_file *cfg, const char *filename)
{
FILE *f = fopen(filename, "wb");
......
......@@ -10,6 +10,8 @@ struct config_file;
extern int cfg_get_int(struct config_file *cfg, const char *key, int *value);
extern struct config_file *cfg_load(const char *filename, int overwrite);
extern int cfg_set_int(struct config_file *cfg, const char *key, int value);
extern int cfg_set_str(struct config_file *cfg, const char *key, char *value);
extern int cfg_get_str(struct config_file *cfg, const char *key, char *value);
extern int cfg_save(struct config_file *cfg, const char *filename);
extern void cfg_free(struct config_file *cfg);
extern void cfg_close(struct config_file *cfg);
......
......@@ -92,6 +92,7 @@ static struct rts_pll_state _pll_state;
/* path to the file where Low Phase Drift calib parameters are stored */
static char *_calibrationFileName = "/update/tx_phase_cal.conf";
struct config_file *_calibrationConfig; // Calibration config form file
static char *_fpgaStatusFileName = "/tmp/load_fpga_status";
static inline void updatePllState(struct hal_port_state * ps) {
// update PLL state once for all ports
......@@ -470,11 +471,32 @@ int hal_port_tx_setup_fsm_run( struct hal_port_state * ps )
return fsm_generic_run(&ps->lpdc.txSetupFSM);
}
static int get_fpga_md5(char *buf)
{
FILE *fpga_status = fopen(_fpgaStatusFileName, "r");
if (!fpga_status)
return 0;
/* first line is the status */
fscanf(fpga_status, "%33s\n", buf);
if (strncmp(buf, "load_ok", 20) || feof(fpga_status)) {
/* something went wrong and FPGA is not loaded or MD5 not
* present in the file */
fclose(fpga_status);
return 0;
}
fscanf(fpga_status, "%33s\n", buf);
fclose(fpga_status);
return 1;
}
/* if config is present then update the calibration data */
static void _load_tx_calibration_file(struct hal_port_state * ports) {
int i = 0;
halGlobalLPDC_t * gl = ports[0].lpdc.globalLpdc;
char md5[33], lpdc_md5[33];
// Read calibration file, if it exists
_calibrationConfig = cfg_load(_calibrationFileName, 0);
......@@ -485,7 +507,22 @@ static void _load_tx_calibration_file(struct hal_port_state * ports) {
_calibrationFileName);
gl->calFileSynced = 0;
return;
}
}
/* use tx_phase_cal.conf file only if it was generated for the currently
* running FPGA bitstream */
if (get_fpga_md5(md5) && cfg_get_str(_calibrationConfig, "MD5", lpdc_md5)) {
if (strncmp(md5, lpdc_md5, 32)) {
pr_error("FPGA bitstream MD5 not matching, cannot load LPDC file\n");
pr_error("loaded md5 = %32s\n", md5);
pr_error("lpdc md5 = %32s\n", lpdc_md5);
cfg_close(_calibrationConfig);
return;
} else
pr_info("Matched FPGA bitstream MD5, loading LPDC file\n");
} else {
pr_warning("Can't get MD5 of loaded bitstream\n");
}
pr_info("Loading LPCD config data from %s\n", _calibrationFileName);
......@@ -528,6 +565,7 @@ static void _write_tx_calibration_file(struct hal_port_state * ps)
{
int i;
halGlobalLPDC_t * gl = ps->lpdc.globalLpdc;
char md5[33];
/* Only the first LPDC-supporting port writes the file. Otherwise,
there is problem with pointers when looping through port structures
......@@ -538,16 +576,15 @@ static void _write_tx_calibration_file(struct hal_port_state * ps)
if(gl->calFileSynced)
return;
if (file_exists(_calibrationFileName))
{
pr_warning("Tx calibration file exists, yet it has not been"
" synched. Something seems wrong. Should not get here\n");
return;
}
struct config_file *cfg = cfg_load(_calibrationFileName, 1);
struct hal_port_state *_ps=ps;
/* first, store MD5 of the bitstream */
if (!get_fpga_md5(md5))
sprintf(md5, "ERROR");
cfg_set_str(cfg, "MD5", md5);
for (i = gl->firstLpdcPort; i <= gl->lastLpdcPort; i++) {
if (_ps->in_use && _ps->lpdc.isSupported)
......
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