White Rabbit Switch - Gateware issueshttps://ohwr.org/project/wr-switch-hdl/issues2019-02-12T09:51:36Zhttps://ohwr.org/project/wr-switch-hdl/issues/15SoftPLL: improve locking to external clock2019-02-12T09:51:36ZGrzegorz DanilukSoftPLL: improve locking to external clockRewrite external channel of SoftPLL to improve locking to 10MHz & 1PPS
from atomic clock/GPSDO. This update replaces the bang-bang phase
detector we used up till now with DMTD-based locking.
This HDL update is required for the fix of [locking issue described in
wr-switch-sw project](https://www.ohwr.org/project/wr-switch-sw/issues/150)https://ohwr.org/project/wr-switch-hdl/issues/16VID for untagged frames in fast Match2019-02-12T09:51:36ZMaciej LipinskiVID for untagged frames in fast MatchfastMatch: should default to VID=0 if has\_vid=0. currently the has\_vid
is ignored
(this should not cause problems but should be cleaned up for
consistency)Maciej LipinskiMaciej Lipinskihttps://ohwr.org/project/wr-switch-hdl/issues/17prio_override flag - non-coherent interpretation2019-02-12T09:51:36ZMaciej Lipinskiprio_override flag - non-coherent interpretationThe flag is considered when overriding priority by the full\_match
interpretation in the wrsw\_rtu but
it is ignored by the fast\_match implementation. this might cause
unpredictable behavior if
anyone ever want to use this very advanced feature.Maciej LipinskiMaciej Lipinskihttps://ohwr.org/project/wr-switch-hdl/issues/18Priority recognision in VLAN-tagged frames2019-02-12T09:51:37ZMaciej LipinskiPriority recognision in VLAN-tagged framesit seems that the priority of incoming VLAN-tagged frames is not
recognized:
\- pstats show always prio=0
\- all priorities are recognized as HP if the masks et only to 0&7 prio
it seems something is wrong in rx\_path.https://ohwr.org/project/wr-switch-hdl/issues/19Add HW-forward-to-CPU of Reserved addresses2019-02-12T09:51:37ZMaciej LipinskiAdd HW-forward-to-CPU of Reserved addressesIt requires modifying slightly already existing forward of PTP frames to
CPUMaciej LipinskiMaciej Lipinskihttps://ohwr.org/project/wr-switch-hdl/issues/20Unrecognized queue - prevent overwhelming2019-02-12T09:51:38ZMaciej LipinskiUnrecognized queue - prevent overwhelmingwhen a burst of frames from unknown address is received, the same
request is put on the learning queue a number of times (it takes quite
long for the CPU to process the first learning request, until then all
frames from this MAC as considered unrecognized)
implement some cashing mechanism to prevent duplicate entries in the
unrecognized queueMaciej LipinskiMaciej Lipinskihttps://ohwr.org/project/wr-switch-hdl/issues/21v3.3 - WR Switch locks on wrong offset once in a while2019-02-12T09:51:38ZGrzegorz Danilukv3.3 - WR Switch locks on wrong offset once in a whileSometimes after connecting the fiber WR Switch locks on wrong offset
(e.g. 3ns, 7ns) and stays that way. The event is very rare but it
happens once in a while.https://ohwr.org/project/wr-switch-hdl/issues/22WR Switch crashes under the burst of frames.2019-02-12T09:51:39ZGrzegorz DanilukWR Switch crashes under the burst of frames.Although it was proven in existing installations that the WR Switch
provides a stable timing distribution, its networking features are still
a work in progress. The low latency features are not in the official
firmware, but the Ethernet switching functionality is there.
To verify the performance of Ethernet switching, the tests were made
with *Spirent TextCenter SPT-2U* device. Results for the WR Switch v3.3
running latest stable firmware release v3.3 are presented in the table
(100% load is the full Gigabit Ethernet
load):
![](/uploads/e0e799b6e336fadbe61c55414ed896c3/v3.3_networking_test.png)
You can see there, that for some loads WR Switch starts loosing frames.
It's especially notable for small payloads (64 bytes). Moreover, when it
starts loosing 100% frames, it's unable to recover the correct state
when the traffic load is reduced (i.e. bursting a port with 94% load of
128 bytes crashes the WR Switch so that it's unable to forward any more
Ethernet frames, even with 10% load).
Current version of the WR Switch gateware/software can be crashed with a
burst of Ethernet frames. The threshold when the crash occurs depends on
the frames size and the traffic load.
### Files
* [v3.3_networking_test.png](/uploads/e0e799b6e336fadbe61c55414ed896c3/v3.3_networking_test.png)Grzegorz DanilukGrzegorz Danilukhttps://ohwr.org/project/wr-switch-hdl/issues/23Tagging of PTP (and other slow protocol frames)2019-02-12T09:51:40ZMaciej LipinskiTagging of PTP (and other slow protocol frames)If we use tagging at the ingress port, we tag with VLAN frame all the
incoming traffic, this also concerns PTP, RSTP, etc:
1\) related to other issue: we need to forward this to CPU regardless of
VLAN tag
2\) not sure it's good if CPU receives this traffic with VLAN tags,
possible solution: untag all the traffic coming to CPU -\> needs to
brainstormed whether this is goodGrzegorz DanilukGrzegorz Danilukhttps://ohwr.org/project/wr-switch-hdl/issues/24VLAN-wildcard MAC entry (e.g.: broadcast)2023-03-01T23:37:13ZMaciej LipinskiVLAN-wildcard MAC entry (e.g.: broadcast)it would be good to be able to define a MAC entry for all VLANs (might
even be in standard)Maciej LipinskiMaciej Lipinskihttps://ohwr.org/project/wr-switch-hdl/issues/25v3.0 - [PWM] FANs are turned off by default2019-02-12T09:51:40ZGrzegorz Danilukv3.0 - [PWM] FANs are turned off by defaultPWM HDL module adjusting the speed of FANs in WR Switch box makes them
turned off by default. If something bad happens with HAL software and it
will not start when the switch boots, user will end up with programmed
FPGA but no cooling from FANs.Grzegorz DanilukGrzegorz Danilukhttps://ohwr.org/project/wr-switch-hdl/issues/26Switch locking to wrong offset2019-02-12T09:51:41ZGrzegorz DanilukSwitch locking to wrong offsetAfter replugging the fiber WR slave Switch sometimes locks with the
offset about -700 ps. If you are unlucky and have 2-3 layers of
switches, your WR network might not be sub-ns any more.
### Files
* [switch_bug.PNG](/uploads/7fb82df2b752d7991aee2025682a48ce/switch_bug.PNG)Grzegorz DanilukGrzegorz Danilukhttps://ohwr.org/project/wr-switch-hdl/issues/27v4-dev - [Endpoint] VLAN tagging/untagging2019-02-12T09:51:42ZMaciej Lipinskiv4-dev - [Endpoint] VLAN tagging/untaggingFixed bugs in Endpoint:
\- proper tagging of frames
\- untagging of frames
\- passing the newly tagged VLAN to RTU
Tested:
\- Port as Access Point which adds VLAN tag
\- Untagging on egress
Still, all the combinations in the attached table needs to be tested
### Files
* [Support_to_Enhanced_Internal_Sublayer_Service.pdf](/uploads/728d0d589d1c12569d6c85f7c34bd24d/Support_to_Enhanced_Internal_Sublayer_Service.pdf)Maciej LipinskiMaciej Lipinskihttps://ohwr.org/project/wr-switch-hdl/issues/28activity LED for wr0 is never blinking2019-02-12T09:51:43ZBenoit Ratactivity LED for wr0 is never blinkingI don't know if it is a feature or not, but it is not possible to make
it work with only one switchhttps://ohwr.org/project/wr-switch-hdl/issues/29Documentation of HDL2019-02-12T09:51:43ZBenoit RatDocumentation of HDLA simple documentation on how to synthetize and which block are involved
could be nicehttps://ohwr.org/project/wr-switch-hdl/issues/30v4.0 - [HWDU] HardWare Debugging Unit2019-02-12T09:51:44ZMaciej Lipinskiv4.0 - [HWDU] HardWare Debugging UnitA simple wishbone interface which enables to read values of critical
registers from different modules of the switch gateware (e.g.: current
number of used pages in the SWcore)Grzegorz DanilukGrzegorz Danilukhttps://ohwr.org/project/wr-switch-hdl/issues/31v3.0 - [RTU] Aging bitmap update at src and dst MAC found2019-02-12T09:51:45ZMaciej Lipinskiv3.0 - [RTU] Aging bitmap update at src and dst MAC foundThe aging map is updated when a MAC entry is found for given source and
destination MAC. This is wrong behaviour. It should be updated only on
source MAC found.Maciej LipinskiMaciej Lipinskihttps://ohwr.org/project/wr-switch-hdl/issues/32v3.0 - [RTU] Aging/update of MAC entry when src port changes2019-02-12T09:51:46ZMaciej Lipinskiv3.0 - [RTU] Aging/update of MAC entry when src port changesThe bug is basic but major: RTU@HW don't remember on which port it
learns a
MAC entry. This means that if the MAC entry is in memory (HTAB), and the
port
on which a source MAC is received is changed before the old MAC entry is
aged....
the invalid MAC entry will be found and considered OK, so updated as if
it was correct...
and it will never age.Maciej LipinskiMaciej Lipinskihttps://ohwr.org/project/wr-switch-hdl/issues/33v4-dev - WR Endpoint events generation2019-02-12T09:51:46ZGrzegorz Danilukv4-dev - WR Endpoint events generationModification of WR Endpoint to trigger events counter by PSTATS module.Grzegorz DanilukGrzegorz Danilukhttps://ohwr.org/project/wr-switch-hdl/issues/34v4-dev - Per-port statistics counters (PSTATS)2019-02-12T09:51:47ZGrzegorz Danilukv4-dev - Per-port statistics counters (PSTATS)Generic module of per-port counters, counting various events generated
inside the WR Switch.Grzegorz DanilukGrzegorz Daniluk