Page version | Author | Commit Message | Last updated | Format |
---|---|---|---|---|
67192fc1 | Grzegorz Daniluk | adding information about sdbfs image for v3.0 release | markdown | |
6f38fa2a | Erik van der Bij | Header for "A: This feature" corrected | markdown | |
f1794694 | Grzegorz Daniluk | adding Vivado synthesis problems to FAQ | markdown | |
3028bb4d | Adam Wujek | add info about 64bit-host version of lm32 cross-compiler | markdown | |
ee7858a7 | Grzegorz Daniluk | markdown | ||
b200767f | Tomasz Wlostowski | markdown | ||
633dc52b | Tomasz Wlostowski | FAQ entry on phase aligning non-125 MHz clocks | markdown | |
0d0210b1 | Grzegorz Daniluk | updated links to example files for embedding wrc.ram into synthesized bitstream | markdown | |
f352d1b0 | Grzegorz Daniluk | adding Peter's instructions on embedding wrc.ram into the bitstream | markdown | |
93d981d6 | Maciej Lipinski | added ref to switch faq | markdown | |
a33e901e | Erik van der Bij | Q on 10 MHz generation | markdown | |
451abd18 | Tomasz Wlostowski | faq entry on timestamping external events | markdown | |
a76123ef | Erik van der Bij | Q: Can the WR Core receive data from a standard Ethernet Switch? | markdown | |
30823690 | Grzegorz Daniluk | updated info about WRPC working as a regular IEEE1588 Slave | markdown | |
5b55e838 | Grzegorz Daniluk | markdown | ||
c96ddb18 | Grzegorz Daniluk | markdown | ||
c2c44e53 | Grzegorz Daniluk | markdown | ||
1a338584 | Grzegorz Daniluk | markdown | ||
364e8486 | Grzegorz Daniluk | markdown | ||
eff65e49 | Grzegorz Daniluk | markdown |