-
Maciej Lipinski authored
In case the data was received in clk_ref_i domain, the flush_p1_i was also received in the clk_ref_i domain. However, it was used in an FSM that works in the clk_sys_i domain. This could cause problems, for example missing the flash_p1_i pulses, thus frames not being sent when requested. It was easily seen in the spec_fixed_latency-demo testbench. In principle, the tx_flush_p1_i does not need to come with data, can be asynchronous to data. It should be a pulse, yet it can happen that it is constantly high (see Tom's testbench of fixed-latency mode). Thus in cross-domain use case : 1. first the pulse is extended to to cycles 2. thanks to this, the gc_sync_ffs module can be used to pass the signal to clk_sys clock domain, whether it is a pulse or not.
03448da1
Name |
Last commit
|
Last update |
---|---|---|
.. | ||
fabric | ||
timing | ||
wr_dacs | ||
wr_eca | ||
wr_endpoint | ||
wr_mini_nic | ||
wr_nic | ||
wr_pps_gen | ||
wr_si57x_interface | ||
wr_softpll_ng | ||
wr_streamers | ||
wr_tbi_phy | ||
wr_tlu | ||
wr_txtsu | ||
wrc_core | ||
Manifest.py |