1. 23 Feb, 2024 1 commit
  2. 05 Feb, 2024 1 commit
  3. 10 Jan, 2024 2 commits
  4. 20 Dec, 2023 1 commit
  5. 19 Dec, 2023 7 commits
  6. 12 Dec, 2023 1 commit
  7. 11 Dec, 2023 3 commits
  8. 24 Nov, 2023 2 commits
    • Andela Kostic's avatar
      Remove wrc.bram · 296c17cc
      Andela Kostic authored
      296c17cc
    • Andela Kostic's avatar
      Support both wrc_core and streamers-on-spec_trigger-distribution testbenches · cd942e13
      Andela Kostic authored
      Now, in testbench/wrc_core there are two folders - modelsim and riviera. Each of them contains
      Manifest.py and run.do adjusted for the simulation with ModelSim/Riviera. One should navigate to
      one of these folders to run the simulation with the corresponding simulator.
      
      The streamers-on-spec_trigger-distribution testbench works now for wrpc-v5 in ModelSim.
      However, it does not work with Riviera. The problem is that the secureip library cannot be
      compiled for the spartan 6 and the Riviera version after 2008.
      cd942e13
  9. 10 Nov, 2023 2 commits
    • Andela Kostic's avatar
      Testbench wrc_core now works with Riviera-PRO · db46b00a
      Andela Kostic authored
      The testbench wrc_core for wrpc-v5 now works both with Riviera-PRO and ModelSim.
      In Manifest.py, some lines should be commented out depending on the simulation tool (ModelSim or Riviera).
      To run the simulation with Riviera, use run_riv.do.
      To run the simulation with ModelSim, use run.do.
      db46b00a
    • Andela Kostic's avatar
      Testbench wrc_core now works with Riviera-PRO · 815f56e2
      Andela Kostic authored
      The testbench wrc_core for wrpc-v5 now works both with Riviera-PRO and ModelSim.
      In Manifest.py, some lines should be commented out depending on the simulation tool (ModelSim or Riviera).
      To run the simulation with Riviera, use run_riv.do.
      To run the simulation with ModelSim, use run.do.
      815f56e2
  10. 09 Nov, 2023 1 commit
    • Andela Kostic's avatar
      Ensure functionality of wrc_core testbench for wrpc-v5 · 06d5a438
      Andela Kostic authored
      In wrpc-v5, LM32 is replaced by RISC-V. Hence, the new compiled WRPC software
      for the simulation is added (wrc.bram file).
      Also, the size of the RAM used by the WRPC software is increased.
      The testbench sets hdl_testbench structure used for communication with the software.
      The simulation works with ModelSim.
      06d5a438
  11. 06 Nov, 2023 1 commit
  12. 22 Oct, 2023 1 commit
  13. 18 Sep, 2023 2 commits
  14. 06 Sep, 2023 5 commits
  15. 05 Sep, 2023 1 commit
  16. 31 Aug, 2023 1 commit
  17. 25 Aug, 2023 2 commits
  18. 21 Jul, 2023 3 commits
  19. 20 Jul, 2023 2 commits
  20. 14 Jun, 2023 1 commit