board: initial support for Xilinx ZCU106 devkit

fc94ea07 · Tomasz Wlostowski · f38234c0 · fc94ea07 · fc94ea07 · fc94ea07
Commit fc94ea07 authored Dec 06, 2019 by Tomasz Wlostowski
7 changed files
--- a/board/zcu106/Manifest.py
+++ b/board/zcu106/Manifest.py
+files = [
+    "xwrc_board_zcu106.vhd" 
+]
+
+modules = {
+    "local" : [
+        "../common",
+    ]
+}
--- a/board/zcu106/wrc_board_zcu106.vhd
+++ b/board/zcu106/wrc_board_zcu106.vhd
--- a/board/zcu106/xwrc_board_zcu106.vhd
+++ b/board/zcu106/xwrc_board_zcu106.vhd
--- a/platform/xilinx/xwrc_platform_xilinx.vhd
+++ b/platform/xilinx/xwrc_platform_xilinx.vhd
--- a/top/zcu106_ref_design/bitstream.xdc
+++ b/top/zcu106_ref_design/bitstream.xdc
+# SPI Flash Programming
+set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 1 [current_design]
+set_property CONFIG_MODE SPIx1 [current_design]
+set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design]
+set_property CONFIG_VOLTAGE 2.5 [current_design]
+set_property CFGBVS VCCO [current_design]
+set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
+set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
+
+
--- a/top/zcu106_ref_design/clock_reset_gen.vhd
+++ b/top/zcu106_ref_design/clock_reset_gen.vhd
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+library unisim;
+use unisim.vcomponents.all;
+
+entity clock_reset_gen is
+  port (
+    clk_i : in std_logic;
+    gpio_o : out std_logic_vector(7 downto 0)
+    );
+
+end entity;
+
+architecture rtl of clock_reset_gen is
+
+  signal cnt      : unsigned(23 downto 0);
+
+
+begin
+
+
+  process(clk_i)
+  begin
+    if rising_edge(clk_i) then
+      cnt <= cnt + 1;
+
+      case cnt(23 downto 21) is
+        when "000"  => gpio_o <= "10000000";
+        when "001"  => gpio_o <= "01000000";
+        when "010"  => gpio_o <= "00100000";
+        when "011"  => gpio_o <= "00010000";
+        when "100"  => gpio_o <= "00001000";
+        when "101"  => gpio_o <= "00000100";
+        when "110"  => gpio_o <= "00000010";
+        when others => gpio_o <= "00000001";
+      end case;
+    end if;
+  end process;
+
+
+end rtl;
--- a/top/zcu106_ref_design/clocks.xdc
+++ b/top/zcu106_ref_design/clocks.xdc