Commit fb3056cf authored by Grzegorz Daniluk's avatar Grzegorz Daniluk

adding SPEC reference design, using SPEC bsp

parent 5fbd64fd
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target = "xilinx"
action = "synthesis"
syn_device = "xc6slx45t"
syn_grade = "-3"
syn_package = "fgg484"
syn_top = "spec_wr_ref_top"
syn_project = "spec_wr_ref.xise"
syn_tool = "ise"
modules = { "local" : "../../top/spec_ref_design/"}
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fetchto = "../../ip_cores"
files = [
"spec_wr_ref_top.vhd",
"spec_wr_ref_top.ucf",
]
modules = {
"local" : [
"../../",
"../../board/spec",
],
"git" : [
"git://ohwr.org/hdl-core-lib/general-cores.git",
"git://ohwr.org/hdl-core-lib/gn4124-core.git",
"git://ohwr.org/hdl-core-lib/etherbone-core.git",
],
}
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