Commit ce8f6c35 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk

virtex6 determinism: use bufr for tx_out clock

It's used only locally in dmtd sampler. We don't have enough global
clock nets in Virtex6 for 18-port version of WRS.
parent ddf87581
......@@ -320,7 +320,7 @@ architecture rtl of wr_gtx_phy_virtex6_lp is
port map (
O => tx_out_clk,
I => tx_out_clk_buf);
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