Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
W
White Rabbit core collection
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
30
Issues
30
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Schedules
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
White Rabbit core collection
Commits
b6cb633a
Commit
b6cb633a
authored
Sep 25, 2019
by
Tomasz Wlostowski
Committed by
Grzegorz Daniluk
Sep 15, 2020
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
wrc_core: increase LM32 code/data address space to 256 kB
parent
630b5268
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
4 additions
and
4 deletions
+4
-4
wr_core.vhd
modules/wrc_core/wr_core.vhd
+4
-4
No files found.
modules/wrc_core/wr_core.vhd
View file @
b6cb633a
...
...
@@ -6,7 +6,7 @@
-- Author : Grzegorz Daniluk <grzegorz.daniluk@cern.ch>
-- Company : CERN (BE-CO-HT)
-- Created : 2011-02-02
-- Last update: 2019-0
3-29
-- Last update: 2019-0
7-24
-- Platform : FPGA-generics
-- Standard : VHDL
-------------------------------------------------------------------------------
...
...
@@ -453,8 +453,8 @@ architecture struct of wr_core is
-----------------------------------------------------------------------------
constant
c_layout
:
t_sdb_record_array
(
1
downto
0
)
:
=
(
0
=>
f_sdb_embed_device
(
f_xwb_dpram
(
g_dpram_size
),
x"00000000"
),
1
=>
f_sdb_embed_bridge
(
c_secbar_bridge_sdb
,
x"000
2
0000"
));
constant
c_sdb_address
:
t_wishbone_address
:
=
x"000
3
0000"
;
1
=>
f_sdb_embed_bridge
(
c_secbar_bridge_sdb
,
x"000
4
0000"
));
constant
c_sdb_address
:
t_wishbone_address
:
=
x"000
5
0000"
;
signal
cbar_slave_i
:
t_wishbone_slave_in_array
(
2
downto
0
);
signal
cbar_slave_o
:
t_wishbone_slave_out_array
(
2
downto
0
);
...
...
@@ -787,7 +787,7 @@ begin
phy_rx_bitslide_i
=>
phy_rx_bitslide_i
,
phy_debug_o
=>
phy_debug_o
,
phy_debug_i
=>
phy_debug_i
,
phy8_o
=>
phy8_o
,
phy8_i
=>
phy8_i
,
phy16_o
=>
phy16_o
,
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment