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White Rabbit core collection
Commit 7df50904 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk
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wrpc: removing dac_clr_n signal, was never used

parent 9b63c42e
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platform/xilinx/wr_xilinx_pkg.vhd
View file @ 7df50904
......@@ -118,7 +118,6 @@ package wr_xilinx_pkg is
pps_ext_i : in std_logic := '0'; -- external 1-PPS from reference
dac_sclk_o : out std_logic; -- Serial Clock Line
dac_din_o : out std_logic; -- Serial Data Line
dac_clr_n_o : out std_logic; -- ?
dac_cs1_n_o : out std_logic; -- Chip Select
dac_cs2_n_o : out std_logic; -- Chip Select
carrier_onewire_b : inout std_logic := '1'; -- read temperature sensor
......
platform/xilinx/xwrc_platform_xilinx.vhd
View file @ 7df50904
......@@ -85,7 +85,6 @@ entity xwrc_platform_xilinx is
---------------------------------------------------------------------------------------
dac_sclk_o : out std_logic; -- Serial Clock Line
dac_din_o : out std_logic; -- Serial Data Line
dac_clr_n_o : out std_logic; -- ?
dac_cs1_n_o : out std_logic; -- Chip Select
dac_cs2_n_o : out std_logic; -- Chip Select
......
top/spec_1_1/wr_core_demo/spec_top.ucf
View file @ 7df50904
......@@ -21,8 +21,6 @@ NET "dac_cs1_n_o" IOSTANDARD = "LVCMOS25";
NET "dac_cs2_n_o" LOC = B3;
NET "dac_cs2_n_o" IOSTANDARD = "LVCMOS25";
#NET "dac_clr_n_o" LOC = F7;
#NET "dac_clr_n_o" IOSTANDARD = "LVCMOS25";
NET "dac_din_o" LOC = C4;
NET "dac_din_o" IOSTANDARD = "LVCMOS25";
......
top/spec_1_1/wr_core_demo/spec_top.vhd
View file @ 7df50904
......@@ -147,7 +147,6 @@ entity spec_top is
-- the clk_ref oscillator, the second (CS2) - the clk_dmtd VCXO.
dac_sclk_o : out std_logic;
dac_din_o : out std_logic;
dac_clr_n_o : out std_logic;
dac_cs1_n_o : out std_logic;
dac_cs2_n_o : out std_logic;
......@@ -596,7 +595,6 @@ begin
-- I2C to control DAC
dac_sclk_o => dac_sclk_o,
dac_din_o => dac_din_o,
dac_clr_n_o => dac_clr_n_o,
dac_cs1_n_o => dac_cs1_n_o,
dac_cs2_n_o => dac_cs2_n_o,
......
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