# TIMESPEC TS_VCXO_MHZ20 = PERIOD "VCXO_MHZ20" 21 MHz HIGH 50%;
TIMESPEC TS_VCXO_MHZ20 = PERIOD "VCXO_MHZ20" 50 ns HIGH 50%;
# main
NET "VCXO_MHZ125_N" TNM_NET = VCXO_MHZ125_N;
# ML-replaced
# TIMESPEC TS_VCXO_MHZ125_N = PERIOD "VCXO_MHZ125_N" 132 MHz HIGH 50%;
TIMESPEC TS_VCXO_MHZ125_N = PERIOD "VCXO_MHZ125_N" 8 ns HIGH 50%;
NET "VCXO_MHZ125_P" TNM_NET = VCXO_MHZ125_P;
# ML-replaced
# TIMESPEC TS_VCXO_MHZ125_P = PERIOD "VCXO_MHZ125_P" 132 MHz HIGH 50%;
TIMESPEC TS_VCXO_MHZ125_P = PERIOD "VCXO_MHZ125_P" 8 ns HIGH 50%;
# SFP:
NET "GTP118_CLK_N" TNM_NET = GTP118_CLK_N;
# ML-replaced
#TIMESPEC TS_GTP118_CLK_N = PERIOD "GTP118_CLK_N" 132 MHz HIGH 50%;
TIMESPEC TS_GTP118_CLK_N = PERIOD "GTP118_CLK_N" 8 ns HIGH 50%;
NET "GTP118_CLK_P" TNM_NET = GTP118_CLK_P;
# ML-replaced
#TIMESPEC TS_GTP118_CLK_P = PERIOD "GTP118_CLK_P" 132 MHz HIGH 50%;
TIMESPEC TS_GTP118_CLK_P = PERIOD "GTP118_CLK_P" 8 ns HIGH 50%;
NET "cmp_xwrc_board_vxs/cmp_xwrc_platform/gen_phy_virtex5.cmp_gtp/ch1_rx_rec_clk_pad" TNM_NET = cmp_xwrc_board_vxs/cmp_xwrc_platform/gen_phy_virtex5.cmp_gtp/ch1_rx_rec_clk_pad;
TIMESPEC TS_cmp_xwrc_board_vxs_cmp_xwrc_platform_gen_phy_virtex5_cmp_gtp_ch1_rx_rec_clk_pad = PERIOD "cmp_xwrc_board_vxs/cmp_xwrc_platform/gen_phy_virtex5.cmp_gtp/ch1_rx_rec_clk_pad" 8 ns HIGH 50%;