wr_core: disabled debugging in LM32 to improve timing

1648bf24 · Tomasz Wlostowski · Grzegorz Daniluk · f6698333 · 1648bf24
Commit 1648bf24 authored Feb 16, 2017 by Tomasz Wlostowski Committed by Grzegorz Daniluk Feb 16, 2017
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wr_core.vhd modules/wrc_core/wr_core.vhd +1 -1

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--- a/modules/wrc_core/wr_core.vhd
+++ b/modules/wrc_core/wr_core.vhd
@@ -751,7 +751,7 @@ begin
  -- LM32
  -----------------------------------------------------------------------------
  LM32_CORE : xwb_lm32
-    generic map(g_profile => "medium_icache_debug")
+    generic map(g_profile => "medium_icache")
    port map(
      clk_sys_i => clk_sys_i,
      rst_n_i   => rst_wrc_n,