Commit 099e58a1 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk

rename signals needed for absolute calibration

parent 306ef2bb
......@@ -152,8 +152,8 @@ package wr_board_pkg is
tm_clk_aux_locked_o : out std_logic_vector(g_aux_clks-1 downto 0);
timestamps_o : out t_txtsu_timestamp;
timestamps_ack_i : in std_logic := '1';
txts_o : out std_logic;
rxts_o : out std_logic;
abscal_txts_o : out std_logic;
abscal_rxts_o : out std_logic;
fc_tx_pause_req_i : in std_logic := '0';
fc_tx_pause_delay_i : in std_logic_vector(15 downto 0) := x"0000";
fc_tx_pause_ready_o : out std_logic;
......
......@@ -219,8 +219,8 @@ entity xwrc_board_common is
-----------------------------------------
-- Timestamp helper signals, used for Absolute Calibration
-----------------------------------------
txts_o : out std_logic;
rxts_o : out std_logic;
abscal_txts_o : out std_logic;
abscal_rxts_o : out std_logic;
---------------------------------------------------------------------------
-- Pause Frame Control
......@@ -408,8 +408,8 @@ begin -- architecture struct
wrf_snk_i => wrf_snk_in,
timestamps_o => timestamps_o,
timestamps_ack_i => timestamps_ack_i,
txts_o => txts_o,
rxts_o => rxts_o,
abscal_txts_o => abscal_txts_o,
abscal_rxts_o => abscal_rxts_o,
fc_tx_pause_req_i => fc_tx_pause_req_i,
fc_tx_pause_delay_i => fc_tx_pause_delay_i,
fc_tx_pause_ready_o => fc_tx_pause_ready_o,
......
......@@ -97,8 +97,8 @@ package wr_spec_pkg is
tm_clk_aux_locked_o : out std_logic_vector(g_aux_clks-1 downto 0);
timestamps_o : out t_txtsu_timestamp;
timestamps_ack_i : in std_logic := '1';
txts_o : out std_logic;
rxts_o : out std_logic;
abscal_txts_o : out std_logic;
abscal_rxts_o : out std_logic;
fc_tx_pause_req_i : in std_logic := '0';
fc_tx_pause_delay_i : in std_logic_vector(15 downto 0) := x"0000";
fc_tx_pause_ready_o : out std_logic;
......
......@@ -263,8 +263,8 @@ entity wrc_board_spec is
-----------------------------------------
-- Timestamp helper signals, used for Absolute Calibration
-----------------------------------------
txts_o : out std_logic;
rxts_o : out std_logic;
abscal_txts_o : out std_logic;
abscal_rxts_o : out std_logic;
---------------------------------------------------------------------------
-- Pause Frame Control
......@@ -491,8 +491,8 @@ begin -- architecture struct
tm_clk_aux_locked_o => tm_clk_aux_locked_o,
timestamps_o => timestamps_out,
timestamps_ack_i => tstamps_ack_i,
txts_o => txts_o,
rxts_o => rxts_o,
abscal_txts_o => abscal_txts_o,
abscal_rxts_o => abscal_rxts_o,
fc_tx_pause_req_i => fc_tx_pause_req_i,
fc_tx_pause_delay_i => fc_tx_pause_delay_i,
fc_tx_pause_ready_o => fc_tx_pause_ready_o,
......
......@@ -219,8 +219,8 @@ entity xwrc_board_spec is
-----------------------------------------
-- Timestamp helper signals, used for Absolute Calibration
-----------------------------------------
txts_o : out std_logic;
rxts_o : out std_logic;
abscal_txts_o : out std_logic;
abscal_rxts_o : out std_logic;
---------------------------------------------------------------------------
-- Pause Frame Control
......@@ -502,8 +502,8 @@ begin -- architecture struct
tm_clk_aux_locked_o => tm_clk_aux_locked_o,
timestamps_o => timestamps_o,
timestamps_ack_i => timestamps_ack_i,
txts_o => txts_o,
rxts_o => rxts_o,
abscal_txts_o => abscal_txts_o,
abscal_rxts_o => abscal_rxts_o,
fc_tx_pause_req_i => fc_tx_pause_req_i,
fc_tx_pause_delay_i => fc_tx_pause_delay_i,
fc_tx_pause_ready_o => fc_tx_pause_ready_o,
......
......@@ -265,8 +265,12 @@ entity wr_core is
txtsu_ts_incorrect_o : out std_logic;
txtsu_stb_o : out std_logic;
txtsu_ack_i : in std_logic := '1';
txts_o : out std_logic;
rxts_o : out std_logic;
-----------------------------------------
-- Timestamp helper signals, used for Absolute Calibration
-----------------------------------------
abscal_txts_o : out std_logic;
abscal_rxts_o : out std_logic;
-----------------------------------------
-- Pause Frame Control
......@@ -778,8 +782,8 @@ begin
wb_i => ep_wb_in,
wb_o => ep_wb_out,
rmon_events_o => open,
txts_o => txts_o,
rxts_o => rxts_o,
txts_o => abscal_txts_o,
rxts_o => abscal_rxts_o,
fc_tx_pause_req_i => fc_tx_pause_req_i,
fc_tx_pause_delay_i => fc_tx_pause_delay_i,
fc_tx_pause_ready_o => fc_tx_pause_ready_o,
......
......@@ -445,8 +445,8 @@ package wrcore_pkg is
timestamps_o : out t_txtsu_timestamp;
timestamps_ack_i : in std_logic := '1';
txts_o : out std_logic;
rxts_o : out std_logic;
abscal_txts_o : out std_logic;
abscal_rxts_o : out std_logic;
fc_tx_pause_req_i : in std_logic := '0';
fc_tx_pause_delay_i : in std_logic_vector(15 downto 0) := x"0000";
......@@ -663,8 +663,12 @@ package wrcore_pkg is
txtsu_ts_incorrect_o : out std_logic;
txtsu_stb_o : out std_logic;
txtsu_ack_i : in std_logic := '1';
txts_o : out std_logic;
rxts_o : out std_logic;
-----------------------------------------
-- Timestamp helper signals, used for Absolute Calibration
-----------------------------------------
abscal_txts_o : out std_logic;
abscal_rxts_o : out std_logic;
-----------------------------------------
-- Pause Frame Control
......
......@@ -219,8 +219,8 @@ entity xwr_core is
-----------------------------------------
-- Timestamp helper signals, used for Absolute Calibration
-----------------------------------------
txts_o : out std_logic;
rxts_o : out std_logic;
abscal_txts_o : out std_logic;
abscal_rxts_o : out std_logic;
-----------------------------------------
-- Pause Frame Control
......@@ -398,8 +398,9 @@ begin
txtsu_ts_incorrect_o => timestamps_o.incorrect,
txtsu_stb_o => timestamps_o.stb,
txtsu_ack_i => timestamps_ack_i,
txts_o => txts_o,
rxts_o => rxts_o,
abscal_txts_o => abscal_txts_o,
abscal_rxts_o => abscal_rxts_o,
fc_tx_pause_req_i => fc_tx_pause_req_i,
fc_tx_pause_delay_i => fc_tx_pause_delay_i,
......
......@@ -286,8 +286,8 @@ architecture top of spec_wr_ref_top is
signal onewire_oe : std_logic;
-- LEDs and GPIO
signal wrc_txts_out : std_logic;
signal wrc_rxts_out : std_logic;
signal wrc_abscal_txts_out : std_logic;
signal wrc_abscal_rxts_out : std_logic;
signal wrc_pps_out : std_logic;
signal wrc_pps_led : std_logic;
signal wrc_pps_in : std_logic;
......@@ -474,8 +474,8 @@ begin -- architecture top
wb_eth_master_o => cnx_master_out(c_WB_MASTER_ETHBONE),
wb_eth_master_i => cnx_master_in(c_WB_MASTER_ETHBONE),
txts_o => wrc_txts_out,
rxts_o => wrc_rxts_out,
abscal_txts_o => wrc_abscal_txts_out,
abscal_rxts_o => wrc_abscal_rxts_out,
pps_ext_i => wrc_pps_in,
pps_p_o => wrc_pps_out,
......@@ -543,9 +543,8 @@ begin -- architecture top
wrc_pps_in <= dio_in(3);
dio_out(0) <= wrc_pps_out;
-- dio_out(1) <= clk_ref_div2;
dio_out(1) <= wrc_rxts_out;
dio_out(2) <= wrc_txts_out;
dio_out(1) <= wrc_abscal_rxts_out;
dio_out(2) <= wrc_abscal_txts_out;
-- LEDs
U_Extend_PPS : gc_extend_pulse
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment