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White Rabbit core collection
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White Rabbit core collection
Commits
055d60af
Commit
055d60af
authored
May 22, 2013
by
Wesley W. Terpstra
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altera: update top files to use autogenerated mega functions
parent
5f323f44
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12 changed files
with
91 additions
and
93 deletions
+91
-93
.gitignore
.gitignore
+2
-1
arria5_rxclkout.txt
platform/altera/wr_arria5_phy/arria5_rxclkout.txt
+11
-0
Makefile
syn/gsi_exploder/wr_core_demo/Makefile
+3
-6
Manifest.py
syn/gsi_exploder/wr_core_demo/Manifest.py
+2
-0
exploder_top.qsf
syn/gsi_exploder/wr_core_demo/exploder_top.qsf
+32
-39
exploder_top.tcl
syn/gsi_exploder/wr_core_demo/exploder_top.tcl
+1
-0
Makefile
syn/gsi_scu/wr_core_demo/Makefile
+3
-6
Manifest.py
syn/gsi_scu/wr_core_demo/Manifest.py
+2
-0
scu.qsf
syn/gsi_scu/wr_core_demo/scu.qsf
+31
-39
scu.tcl
syn/gsi_scu/wr_core_demo/scu.tcl
+2
-0
exploder_top.vhd
top/gsi_exploder/wr_core_demo/exploder_top.vhd
+1
-1
scu_top.vhd
top/gsi_scu/wr_core_demo/scu_top.vhd
+1
-1
No files found.
.gitignore
View file @
055d60af
...
...
@@ -15,4 +15,5 @@ doc/
*.o
*.bin
*.elf
Makefile
\ No newline at end of file
Makefile
ip_cores
platform/altera/wr_arria5_phy/arria5_rxclkout.txt
View file @
055d60af
-- megafunction wizard: %ALTCLKCTRL%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: altclkctrl
--altclkctrl CBX_AUTO_BLACKBOX="ALL" CLOCK_TYPE="Global Clock" DEVICE_FAMILY="Arria V" ENA_REGISTER_MODE="always enabled" USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION="OFF" ena inclk outclk
--VERSION_BEGIN 12.1SP1 cbx_altclkbuf 2013:01:31:18:04:54:SJ cbx_cycloneii 2013:01:31:18:04:54:SJ cbx_lpm_add_sub 2013:01:31:18:04:54:SJ cbx_lpm_compare 2013:01:31:18:04:54:SJ cbx_lpm_decode 2013:01:31:18:04:54:SJ cbx_lpm_mux 2013:01:31:18:04:54:SJ cbx_mgl 2013:01:31:19:27:12:SJ cbx_stratix 2013:01:31:18:04:54:SJ cbx_stratixii 2013:01:31:18:04:54:SJ cbx_stratixiii 2013:01:31:18:04:54:SJ cbx_stratixv 2013:01:31:18:04:54:SJ VERSION_END
-- ============================================================
-- CNX file retrieval info
-- ============================================================
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Arria V"
-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
-- Retrieval info: PRIVATE: clock_inputs NUMERIC "1"
...
...
@@ -17,3 +27,4 @@
-- Retrieval info: GEN_FILE: TYPE_NORMAL arria5_rxclkout.cmp TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL arria5_rxclkout.bsf FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL arria5_rxclkout_inst.vhd FALSE
-- Retrieval info: LIB_FILE: arriav
syn/gsi_exploder/wr_core_demo/Makefile
View file @
055d60af
...
...
@@ -13,13 +13,10 @@ clean:
rm
-f
$(TARGET)
.rpd
$(TARGET)
.jic
$(TARGET)
.pof
$(TARGET)
.sof
$(TARGET)
.dep
%.sof
:
%.qsf
hdlmake
-v
|
sed
-n
-e
's/ *$$/:/;s/^.* Parsing manifest file: *//p'
>
$*
.dep
sed
-n
-e
's/"//g;s/$$/:/;s/set_global_assignment.*-name.*_FILE //p'
<
$<
>>
$*
.dep
hdlmake
-
-quartus-proj
-
v
|
sed
-n
-e
's/ *$$/:/;s/^.* Parsing manifest file: *//p'
>
$*
.dep
sed
-n
-e
's/"//g;s/
quartus_sh://;s/
$$/:/;s/set_global_assignment.*-name.*_FILE //p'
<
$<
>>
$*
.dep
echo
"
$*
.sof
$@
:
$<
"
`
sed
's/ *: *$$//'
<
$*
.dep
`
>>
$*
.dep
$(QUARTUS_BIN)
/quartus_map
$*
$(QUARTUS_BIN)
/quartus_fit
$*
$(QUARTUS_BIN)
/quartus_asm
$*
$(QUARTUS_BIN)
/quartus_sta
$*
$(QUARTUS_BIN)
/quartus_sh
--tcl_eval
load_package flow
\;
project_open
$*
\;
execute_flow
-compile
%.opt
:
%.sof
echo
"BITSTREAM_COMPRESSION=ON"
>
$@
...
...
syn/gsi_exploder/wr_core_demo/Manifest.py
View file @
055d60af
...
...
@@ -9,6 +9,8 @@ syn_package = "25"
syn_top
=
"exploder_top"
syn_project
=
"exploder_top"
quartus_preflow
=
"exploder_top.tcl"
modules
=
{
"local"
:
[
"../../../"
,
"../../../top/gsi_exploder/wr_core_demo"
]}
syn/gsi_exploder/wr_core_demo/exploder_top.qsf
View file @
055d60af
This diff is collapsed.
Click to expand it.
syn/gsi_exploder/wr_core_demo/exploder_top.tcl
0 → 100644
View file @
055d60af
source
../../../platform/altera/wr_arria2_phy/wr_arria2_phy.tcl
syn/gsi_scu/wr_core_demo/Makefile
View file @
055d60af
...
...
@@ -13,13 +13,10 @@ clean:
rm
-f
$(TARGET)
.rpd
$(TARGET)
.jic
$(TARGET)
.pof
$(TARGET)
.sof
$(TARGET)
.dep
%.sof
:
%.qsf
hdlmake
-v
|
sed
-n
-e
's/ *$$/:/;s/^.* Parsing manifest file: *//p'
>
$*
.dep
sed
-n
-e
's/"//g;s/$$/:/;s/set_global_assignment.*-name.*_FILE //p'
<
$<
>>
$*
.dep
hdlmake
-
-quartus-proj
-
v
|
sed
-n
-e
's/ *$$/:/;s/^.* Parsing manifest file: *//p'
>
$*
.dep
sed
-n
-e
's/"//g;s/
quartus_sh://;s/
$$/:/;s/set_global_assignment.*-name.*_FILE //p'
<
$<
>>
$*
.dep
echo
"
$*
.sof
$@
:
$<
"
`
sed
's/ *: *$$//'
<
$*
.dep
`
>>
$*
.dep
$(QUARTUS_BIN)
/quartus_map
$*
$(QUARTUS_BIN)
/quartus_fit
$*
$(QUARTUS_BIN)
/quartus_asm
$*
$(QUARTUS_BIN)
/quartus_sta
$*
$(QUARTUS_BIN)
/quartus_sh
--tcl_eval
load_package flow
\;
project_open
$*
\;
execute_flow
-compile
%.opt
:
%.sof
echo
"BITSTREAM_COMPRESSION=ON"
>
$@
...
...
syn/gsi_scu/wr_core_demo/Manifest.py
View file @
055d60af
...
...
@@ -9,4 +9,6 @@ syn_package = "29"
syn_top
=
"scu_top"
syn_project
=
"scu"
quartus_preflow
=
"scu.tcl"
modules
=
{
"local"
:
[
"../../../"
,
"../../../top/gsi_scu/wr_core_demo"
]}
syn/gsi_scu/wr_core_demo/scu.qsf
View file @
055d60af
This diff is collapsed.
Click to expand it.
syn/gsi_scu/wr_core_demo/scu.tcl
0 → 100644
View file @
055d60af
source
../../../ip_cores/general-cores/platform/altera/wb_pcie/arria2.tcl
source
../../../platform/altera/wr_arria2_phy/wr_arria2_phy.tcl
top/gsi_exploder/wr_core_demo/exploder_top.vhd
View file @
055d60af
...
...
@@ -586,7 +586,7 @@ begin
rst_aux_n_o
=>
open
,
link_ok_o
=>
open
);
wr_gxb_
phy_arriaii_1
:
wr_gxb_phy_arriaii
wr_gxb_
arria2
:
wr_arria2_phy
port
map
(
clk_reconf_i
=>
clk_reconf
,
clk_pll_i
=>
clk_ref
,
...
...
top/gsi_scu/wr_core_demo/scu_top.vhd
View file @
055d60af
...
...
@@ -441,7 +441,7 @@ begin
rst_aux_n_o
=>
open
,
link_ok_o
=>
open
);
wr_gxb_
phy_arriaii_1
:
wr_gxb_phy_arriaii
wr_gxb_
arria2
:
wr_arria2_phy
port
map
(
clk_reconf_i
=>
clk_reconf
,
clk_pll_i
=>
clk_ref
,
...
...
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