Commit 055d60af authored by Wesley W. Terpstra's avatar Wesley W. Terpstra

altera: update top files to use autogenerated mega functions

parent 5f323f44
......@@ -15,4 +15,5 @@ doc/
*.o
*.bin
*.elf
Makefile
\ No newline at end of file
Makefile
ip_cores
-- megafunction wizard: %ALTCLKCTRL%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: altclkctrl
--altclkctrl CBX_AUTO_BLACKBOX="ALL" CLOCK_TYPE="Global Clock" DEVICE_FAMILY="Arria V" ENA_REGISTER_MODE="always enabled" USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION="OFF" ena inclk outclk
--VERSION_BEGIN 12.1SP1 cbx_altclkbuf 2013:01:31:18:04:54:SJ cbx_cycloneii 2013:01:31:18:04:54:SJ cbx_lpm_add_sub 2013:01:31:18:04:54:SJ cbx_lpm_compare 2013:01:31:18:04:54:SJ cbx_lpm_decode 2013:01:31:18:04:54:SJ cbx_lpm_mux 2013:01:31:18:04:54:SJ cbx_mgl 2013:01:31:19:27:12:SJ cbx_stratix 2013:01:31:18:04:54:SJ cbx_stratixii 2013:01:31:18:04:54:SJ cbx_stratixiii 2013:01:31:18:04:54:SJ cbx_stratixv 2013:01:31:18:04:54:SJ VERSION_END
-- ============================================================
-- CNX file retrieval info
-- ============================================================
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Arria V"
-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
-- Retrieval info: PRIVATE: clock_inputs NUMERIC "1"
......@@ -17,3 +27,4 @@
-- Retrieval info: GEN_FILE: TYPE_NORMAL arria5_rxclkout.cmp TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL arria5_rxclkout.bsf FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL arria5_rxclkout_inst.vhd FALSE
-- Retrieval info: LIB_FILE: arriav
......@@ -13,13 +13,10 @@ clean:
rm -f $(TARGET).rpd $(TARGET).jic $(TARGET).pof $(TARGET).sof $(TARGET).dep
%.sof: %.qsf
hdlmake -v | sed -n -e 's/ *$$/:/;s/^.* Parsing manifest file: *//p' > $*.dep
sed -n -e 's/"//g;s/$$/:/;s/set_global_assignment.*-name.*_FILE //p' < $< >> $*.dep
hdlmake --quartus-proj -v | sed -n -e 's/ *$$/:/;s/^.* Parsing manifest file: *//p' > $*.dep
sed -n -e 's/"//g;s/quartus_sh://;s/$$/:/;s/set_global_assignment.*-name.*_FILE //p' < $< >> $*.dep
echo "$*.sof $@: $< " `sed 's/ *: *$$//' < $*.dep` >> $*.dep
$(QUARTUS_BIN)/quartus_map $*
$(QUARTUS_BIN)/quartus_fit $*
$(QUARTUS_BIN)/quartus_asm $*
$(QUARTUS_BIN)/quartus_sta $*
$(QUARTUS_BIN)/quartus_sh --tcl_eval load_package flow \; project_open $* \; execute_flow -compile
%.opt: %.sof
echo "BITSTREAM_COMPRESSION=ON" > $@
......
......@@ -9,6 +9,8 @@ syn_package = "25"
syn_top = "exploder_top"
syn_project = "exploder_top"
quartus_preflow = "exploder_top.tcl"
modules = {"local" : [ "../../../", "../../../top/gsi_exploder/wr_core_demo"]}
source ../../../platform/altera/wr_arria2_phy/wr_arria2_phy.tcl
......@@ -13,13 +13,10 @@ clean:
rm -f $(TARGET).rpd $(TARGET).jic $(TARGET).pof $(TARGET).sof $(TARGET).dep
%.sof: %.qsf
hdlmake -v | sed -n -e 's/ *$$/:/;s/^.* Parsing manifest file: *//p' > $*.dep
sed -n -e 's/"//g;s/$$/:/;s/set_global_assignment.*-name.*_FILE //p' < $< >> $*.dep
hdlmake --quartus-proj -v | sed -n -e 's/ *$$/:/;s/^.* Parsing manifest file: *//p' > $*.dep
sed -n -e 's/"//g;s/quartus_sh://;s/$$/:/;s/set_global_assignment.*-name.*_FILE //p' < $< >> $*.dep
echo "$*.sof $@: $< " `sed 's/ *: *$$//' < $*.dep` >> $*.dep
$(QUARTUS_BIN)/quartus_map $*
$(QUARTUS_BIN)/quartus_fit $*
$(QUARTUS_BIN)/quartus_asm $*
$(QUARTUS_BIN)/quartus_sta $*
$(QUARTUS_BIN)/quartus_sh --tcl_eval load_package flow \; project_open $* \; execute_flow -compile
%.opt: %.sof
echo "BITSTREAM_COMPRESSION=ON" > $@
......
......@@ -9,4 +9,6 @@ syn_package = "29"
syn_top = "scu_top"
syn_project = "scu"
quartus_preflow = "scu.tcl"
modules = {"local" : [ "../../../", "../../../top/gsi_scu/wr_core_demo"]}
This diff is collapsed.
source ../../../ip_cores/general-cores/platform/altera/wb_pcie/arria2.tcl
source ../../../platform/altera/wr_arria2_phy/wr_arria2_phy.tcl
......@@ -586,7 +586,7 @@ begin
rst_aux_n_o => open,
link_ok_o => open);
wr_gxb_phy_arriaii_1 : wr_gxb_phy_arriaii
wr_gxb_arria2 : wr_arria2_phy
port map (
clk_reconf_i => clk_reconf,
clk_pll_i => clk_ref,
......
......@@ -441,7 +441,7 @@ begin
rst_aux_n_o => open,
link_ok_o => open);
wr_gxb_phy_arriaii_1 : wr_gxb_phy_arriaii
wr_gxb_arria2 : wr_arria2_phy
port map (
clk_reconf_i => clk_reconf,
clk_pll_i => clk_ref,
......
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