.gitlab-ci.yml 2.19 KB
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variables:
  GIT_SUBMODULE_STRATEGY: normal
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stages:
- wrpc_compile
- wrpc_syn
- wrpc_sim

job_wrpc_compile:
  stage: wrpc_compile
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  tags:
  - modelsim
  - 10.0c
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  script:
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    - source ~/setup_modelsim.sh
    - cd testbench/wrc_core; hdlmake makefile; make clean; make
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job_wrpc_sim:
  stage: wrpc_sim
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  tags:
  - modelsim
  - 10.0c
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  only:
  - schedules
  script:
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  - source ~/setup_modelsim.sh
  - cp /opt/compiled_libs_ise14.7/modelsim.ini testbench/wr_minic
  - cp /opt/compiled_libs_ise14.7/modelsim.ini testbench/wrc_core
  - cp /opt/compiled_libs_ise14.7/modelsim.ini testbench/wr_streamers/streamers_multi_test
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  - cd testbench && make
  artifacts:
    name: WRPC_SIM_CI_$CI_JOB_ID
    paths:
    - testbench/wrc_core/transcript
    - testbench/wr_minic/transcript
    - testbench/wr_streamers/streamers_multi_test/transcript

job_wrpc_spec:
  stage: wrpc_syn
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  tags:
  - ise
  only:
  - schedules
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  script:
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  - source ~/setup_ise.sh
  - cd syn/spec_ref_design && hdlmake makefile && make
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  artifacts:
    name: WRPC_SPEC_CI_$CI_JOB_ID
    paths:
    - syn/spec_ref_design/*.syr
    - syn/spec_ref_design/*.mrp
    - syn/spec_ref_design/*.bit
    - syn/spec_ref_design/*.bin
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job_wrpc_svec:
  stage: wrpc_syn
  tags:
  - ise
  only:
  - schedules
  script:
  - source ~/setup_ise.sh
  - cd syn/svec_ref_design && hdlmake makefile && make
  artifacts:
    name: WRPC_SVEC_CI_$CI_JOB_ID
    paths:
    - syn/svec_ref_design/*.syr
    - syn/svec_ref_design/*.mrp
    - syn/svec_ref_design/*.bit
    - syn/svec_ref_design/*.bin

job_wrpc_vfchd:
  stage: wrpc_syn
  tags:
  - quartus
  - "16.0"
  only:
  - schedules
  script:
    - source ~/setup_intel.sh
    - cd syn/vfchd_ref_design
    - hdlmake makefile; make
  artifacts:
    name: WRPC_VFCHD_CI_$CI_JOB_ID
    paths:
      - syn/vfchd_ref_design/*.bin
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job_wrpc_pxie_fmc:
  stage: wrpc_syn
  tags:
    - vivado
    - "2018.3"
  only:
  - schedules
  script:
    - source ~/setup_vivado.sh
    - cd syn/pxie_fmc_ref_design
    - hdlmake makefile
    - make files.tcl
    - vivado -mode tcl -source pxie_fmc.tcl
  artifacts:
    name: WRPC_PXIE_CI_$CI_JOB_ID
    paths:
      - syn/pxie_fmc_ref_design/*.rpt
      - syn/pxie_fmc_ref_design/*.dcp
      - syn/pxie_fmc_ref_design/*.bit