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White Rabbit core collection
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Label priority
lpdc for virtex6 (wrs)
!19
· created
Sep 20, 2024
by
Harvey Leicester
wrpc-v5
Merged
0
updated
Sep 23, 2024
QPLL-based tuning on AMD ZCU102 devboards ("Light Rabbit")
!18
· created
Jul 15, 2024
by
Frederik Pfautsch (MLE)
wrpc-v5
25
updated
Jul 26, 2024
platform/xilinx/vivado: Fix generates of clock signals that originate from phys
!17
· created
Jun 05, 2024
by
Frederik Pfautsch (MLE)
wrpc-v5
Merged
0
updated
Jun 13, 2024
modules/wrc_core/wrc_periph.vhd: Add reset signal to sensitivity list
!16
· created
Jun 05, 2024
by
Frederik Pfautsch (MLE)
wrpc-v5
Merged
0
updated
Jun 13, 2024
platform/xilinx/xwrc_platform_vivado.vhd: Generate direct DMTD clock using a BUFR
!15
· created
Jun 05, 2024
by
Frederik Pfautsch (MLE)
wrpc-v5
Merged
0
updated
Jun 13, 2024
WIP: Pieter fasec wrpc v5
!14
· created
May 10, 2024
by
Pieter Van Trappen
wrpc-v5
Merged
2
updated
Aug 08, 2024
modules/wrc_core/wrc_periph: I2C HIGH init value
!13
· created
May 02, 2024
by
Frederik Pfautsch (MLE)
wrpc-v5
Closed
3
updated
Jun 17, 2024
clb reference designs v2, v4 use lpdc via wishbone
!12
· created
Jan 10, 2024
by
Peter Jansweijer
wrpc-v5
Merged
1
updated
Jan 10, 2024
Add generic: Artix7 gtp depends on rx_byte_is_aligned
!11
· created
Dec 12, 2023
by
Peter Jansweijer
wrpc-v5
Merged
0
updated
Dec 12, 2023
wrc_core sim for wrpc-v5 works
!10
· created
Nov 10, 2023
by
Andela Kostic
wrpc-v5
Merged
3
updated
Dec 11, 2023
Update family7 gtx-lp and gthe4-lp, now using lpdc via wishbone mdio
!9
· created
Aug 31, 2023
by
Peter Jansweijer
wrpc-v5
Merged
1
updated
Dec 11, 2023
boards: fix incorrect logic of reset input for aasd
!8
· created
Jul 20, 2023
by
Tristan Gingold
wrpc-v5
Merged
0
updated
Jul 20, 2023
Peter lpdc mdio regs generalize
!7
· created
Jun 07, 2023
by
Peter Jansweijer
wrpc-v5
Merged
0
updated
Jun 09, 2023
expose phy_mdio_master interface on xwrc_board_common
!6
· created
Jun 07, 2023
by
Peter Jansweijer
wrpc-v5
Merged
1
updated
Jun 07, 2023
wr_gtx_phy_virtex6_lp: increase link down detect threshold so the LPDC PHY does…
!5
· created
May 22, 2023
by
Tristan Gingold
wrpc-v5
Merged
0
updated
May 22, 2023
add files for gthe4-lp implementation
!4
· created
Apr 12, 2023
by
Peter Jansweijer
wrpc-v5
Merged
1
updated
Apr 18, 2023
Revert gtp_bitslide.vhd SHA-1: c9cc5cab4a1b0868391d32726c017816f4749a62 back to…
!3
· created
Jan 13, 2023
by
Peter Jansweijer
wrpc-v5
bug
Closed
5
updated
Dec 12, 2023
Avoid the generation of a latch during synthesis
!2
· created
Jan 13, 2023
by
Peter Jansweijer
wrpc-v5
Merged
0
updated
Jun 07, 2023
Peter clb wrpc v5
!1
· created
Oct 09, 2022
by
Peter Jansweijer
proposed_master
Closed
1
updated
Oct 31, 2022