board  = "spec7"
target = "xilinx"
action = "synthesis"

syn_device = "xc7z035"
syn_grade = "-1"
syn_package = "fbg676"

syn_top = "spec7_wr_ref_top"
syn_project = "spec7_wr_ref_top.xpr"

syn_tool = "vivado"

modules = { "local" : "../../top/spec7_ref_design/"}