Quartus error with RAM with 8bit words
I get an error in Quartus Prime Lite 16.1.2 when generating a SRAM with
8 bit words. I am using latest git version from wishbone-generator
Input file and generated vhdl are attached; these are the
errors:
Error (10381): VHDL Type Mismatch error at mainram.vhdl(152): indexed name returns a value whose type does not match "std_logic_vector", the type of the target expression
Error (10381): VHDL Type Mismatch error at mainram.vhdl(157): indexed name returns a value whose type does not match "std_logic_vector", the type of the target expression
I can solve the error if I replace allones(0)
with allones(0 downto 0)
in the generated vhdl file.