V3.2 - +1V0 power supply current limit too low.
The IOcl current limit in +1V0 switching power supply is too low to ensure correct FPGA operation under different conditions.
+1V0 load (from XPower):
- typ: 2.5 A (LX130T), 3.8 A (LX240T)
- max: 3.5 A (LX130T), 5.8 A (LX240T)
Note that the currents were calculated for the current release bitstream, which does not include all the planned features. Therefore, adding an extra 1 A for the current consumed by the extra logic is advisable, resulting with a maximum PSU load of 7 A.
Power supply current limit calculation (based on TPS53126 datasheet)
- worst case (high RDSon, low Itrip, inductance -20%): Ipeak = 4.3 A,
Iocl = 3.2 A,
- average case: Ipeak=5.0 A, Iocl = 3.8 A.
In order to increase the current limit, RTrip resistor (R229) must be changed to 10 kOhm, resulting with:
- worst case: Ipeak = 8.3 A and Iocl = 7.1 A.
- average case: Ipeak = 9.8 A and Iocl = 8.4 A.
This falls within the specs of both the mosfets and the inductor currently used in the design.