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White Rabbit
Commit 3051b232 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk
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all documents use pdflatex and png/pdf figures

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documents/calibration/Makefile
View file @ 3051b232
......@@ -3,10 +3,8 @@ all : wrcalib.pdf
.PHONY : all clean
wrcalib.pdf : wrcalib.tex
latex $^
latex $^
dvips wrcalib
ps2pdf -dPDFSETTINGS=/prepress -dSubsetFonts=true -dEmbedAllFonts=true -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 wrcalib.ps
pdflatex -dPDFSETTINGS=/prepress -dSubsetFonts=true -dEmbedAllFonts=true -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 $^
pdflatex -dPDFSETTINGS=/prepress -dSubsetFonts=true -dEmbedAllFonts=true -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 $^
clean :
rm -f *.eps *.pdf *.dat *.log *.out *.aux *.dvi *.ps *.toc
......
documents/calibration/distant_tricks.tex
View file @ 3051b232
......@@ -30,7 +30,7 @@ Neutrinos to Gran Sasso project \cite{cngs}. It requires:
\begin{figure}[ht]
\begin{center}
\includegraphics[width=.8\textwidth]{calibration/loopback_fibre.ps}
\includegraphics[width=.8\textwidth]{calibration/loopback_fibre.pdf}
\caption{Measuring 1-PPS offset using a loop-back fiber}
\label{fig:loopback}
\end{center}
......
documents/calibration/errors.tex
View file @ 3051b232
......@@ -101,11 +101,11 @@ round-trip delay changes over time for the two fiber cables: 5km and 5m.
\begin{figure}[ht]
a)
\begin{minipage}{.5\textwidth}
\includegraphics[width=\textwidth]{calibration/rtt_long.ps}
\includegraphics[width=\textwidth]{calibration/rtt_long.png}
\end{minipage}
b)
\begin{minipage}{.5\textwidth}
\includegraphics[width=\textwidth]{calibration/rtt_short.ps}
\includegraphics[width=\textwidth]{calibration/rtt_short.png}
\end{minipage}
\caption{$delay_{MM}$ of 5 km (a) and 5 m (b) fiber logged for almost 12 hours using two WR Switches}
\label{fig:errors:deltemp}
......@@ -183,7 +183,7 @@ from a signal generator (e.g. Agilent 33250A) or it can be also a 62.5MHz clock
output taken from a WR Switch.
\begin{figure}[ht]
\begin{center}
\includegraphics[width=\textwidth]{calibration/oscil_meas.ps}
\includegraphics[width=\textwidth]{calibration/oscil_meas.pdf}
\caption{Measuring internal jitter of an oscilloscope}
\label{fig:errors:osc_jitter}
\end{center}
......@@ -193,7 +193,7 @@ oscilloscope using a 62.5MHz clock output from a free-running WR Switch is
presented in figure \ref{fig:errors:lecroy_jitter}.
\begin{figure}
\begin{center}
\includegraphics[width=.8\textwidth]{calibration/lecroy_7300_jitter.ps}
\includegraphics[width=.8\textwidth]{calibration/lecroy_7300_jitter.png}
\caption{Uncertainty of LeCroy Wavepro 7300A oscilloscope}
\label{fig:errors:lecroy_jitter}
\end{center}
......
documents/calibration/intro.tex
View file @ 3051b232
......@@ -8,7 +8,7 @@ hardware delays and fiber propagation latencies presented in figure
\begin{figure}[ht]
\begin{center}
\includegraphics[width=\textwidth]{calibration/link-model.ps}
\includegraphics[width=\textwidth]{calibration/link-model.pdf}
\caption{White Rabbit link model}
\label{fig:intro:link-model}
\end{center}
......
documents/calibration/procedure.tex
View file @ 3051b232
......@@ -23,7 +23,7 @@ It is a few kilometers long and its parameters will be measured.
\begin{figure}[ht]
\begin{center}
\includegraphics[width=.6\textwidth]{calibration/fiber_1.ps}
\includegraphics[width=.6\textwidth]{calibration/fiber_1.pdf}
\caption{Measuring total fiber propagation latency}
\label{fig:refiber:latency}
\end{center}
......@@ -100,7 +100,7 @@ $f_1$, $f_2$ as presented in figure \ref{fig:fiasym}.
\begin{figure}[ht]
\begin{center}
\includegraphics[width=.9\textwidth]{calibration/fiber_2.ps}
\includegraphics[width=.9\textwidth]{calibration/fiber_2.pdf}
\caption{Measuring fiber $f_2$ asymmetry}
\label{fig:fiasym}
\end{center}
......@@ -178,7 +178,7 @@ $\Delta_{RX}$) of the WR Calibrator, the connection shown in figure
\begin{figure}[ht]
\begin{center}
\includegraphics[width=.5\textwidth]{calibration/calibrator.ps}
\includegraphics[width=.5\textwidth]{calibration/calibrator.pdf}
\caption{Measuring Calibrator latencies}
\label{fig:calibrator}
\end{center}
......@@ -243,7 +243,7 @@ will later create a White Rabbit Network (fig.\ref{fig:devices}).
\begin{figure}[ht]
\begin{center}
\includegraphics[width=.5\textwidth]{calibration/wr_device.ps}
\includegraphics[width=.5\textwidth]{calibration/wr_device.pdf}
\caption{WR Device calibration with WR Calibrator and known
fiber $f_1$}
\label{fig:devices}
......
documents/calibration/recover_calibrator.tex
View file @ 3051b232
......@@ -9,7 +9,7 @@ already-deployed network.
\begin{figure}[ht]
\begin{center}
\includegraphics[width=.5\textwidth]{calibration/recover_calibrator.ps}
\includegraphics[width=.5\textwidth]{calibration/recover_calibrator.pdf}
\caption{Calibrating a new WR Calibrator for an already-existing WR network}
\label{fig:recover_calibrator}
\end{center}
......
documents/calibration/wrcalib.tex
View file @ 3051b232
......@@ -62,7 +62,7 @@
\begin{figure}[ht!]
\centering
\vspace{1.3cm}
\includegraphics[width=0.50\textwidth]{logo/WRlogo.ps}
\includegraphics[width=0.50\textwidth]{logo/WRlogo.pdf}
\label{fig:wr_logo}
\end{figure}
......
documents/specifications/HDL/WRS_HDL-SW_IF/Makefile
View file @ 3051b232
......@@ -3,10 +3,8 @@ all : switch_hdl.pdf
.PHONY : all clean
switch_hdl.pdf : switch_hdl.tex
latex $^
latex $^
dvips switch_hdl
ps2pdf switch_hdl.ps
pdflatex -dPDFSETTINGS=/prepress -dSubsetFonts=true -dEmbedAllFonts=true -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 $^
pdflatex -dPDFSETTINGS=/prepress -dSubsetFonts=true -dEmbedAllFonts=true -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 $^
clean :
rm -f *.eps *.pdf *.dat *.log *.out *.aux *.dvi *.ps *.toc
......
documents/specifications/HDL/WRS_HDL-SW_IF/ep.tex
View file @ 3051b232
......@@ -129,7 +129,7 @@ value has to be incremented). The format of data word is presented in figure
\ref{fig:ep:inject_data}:
\begin{figure}[ht]
\begin{center}
\includegraphics[width=.8\textwidth]{switch/ep_inject.ps}
\includegraphics[width=.8\textwidth]{switch/ep_inject.pdf}
\caption{Format of data word for programming the injection engine}
\label{fig:ep:inject_data}
\end{center}
......
documents/specifications/HDL/WRS_HDL-SW_IF/nic.tex
View file @ 3051b232
......@@ -33,7 +33,7 @@ read to get the event which caused the interrupt.
\begin{figure}[ht]
\begin{center}
\includegraphics[width=\textwidth]{switch/nic_txdesc.ps}
\includegraphics[width=\textwidth]{switch/nic_txdesc.pdf}
\caption{Tx descriptor}
\label{fig:nic:tx_desc}
\end{center}
......@@ -57,7 +57,7 @@ read to get the event which caused the interrupt.
\begin{figure}[ht]
\begin{center}
\includegraphics[width=\textwidth]{switch/nic_rxdesc.ps}
\includegraphics[width=\textwidth]{switch/nic_rxdesc.pdf}
\caption{Rx descriptor}
\label{fig:nic:rx_desc}
\end{center}
......
documents/specifications/HDL/WRS_HDL-SW_IF/rts.tex
View file @ 3051b232
......@@ -8,7 +8,7 @@ Real-Time Subsystem.
\begin{figure}[ht]
\begin{center}
\includegraphics[width=.8\textwidth]{switch/rt_sub.ps}
\includegraphics[width=.8\textwidth]{switch/rt_sub.pdf}
\caption{Internal layout of Real-Time Subsystem block}
\label{fig:rts:hdl}
\end{center}
......
documents/specifications/HDL/WRS_HDL-SW_IF/rtu.tex
View file @ 3051b232
......@@ -113,7 +113,7 @@ figure \ref{fig:rtu:htab_adr}.
\begin{figure}[ht]
\begin{center}
\includegraphics[width=.7\textwidth]{switch/rtu_mfifo_adr.ps}
\includegraphics[width=.7\textwidth]{switch/rtu_mfifo_adr.pdf}
\end{center}
\caption{Structure of HTAB address}
\label{fig:rtu:htab_adr}
......
documents/specifications/HDL/WRS_HDL-SW_IF/switch_hdl.tex
View file @ 3051b232
......@@ -88,7 +88,7 @@
\begin{figure}[ht!]
\centering
\vspace{1.3cm}
\includegraphics[width=0.50\textwidth]{logo/WRlogo.ps}
\includegraphics[width=0.50\textwidth]{logo/WRlogo.pdf}
\label{fig:wr_logo}
\end{figure}
......
documents/specifications/HDL/WRS_HDL-SW_IF/top.tex
View file @ 3051b232
......@@ -12,7 +12,7 @@ and Network Interface \linebreak Controller.
\begin{figure}[ht]
\begin{center}
\includegraphics[width=\textwidth]{switch/switch_hdl_v4.0.ps}
\includegraphics[width=\textwidth]{switch/switch_hdl_v4_0.pdf}
\caption{Top HDL design of the WR Switch}
\label{fig:switch_top}
\end{center}
......
documents/specifications/WR-spec/Makefile
View file @ 3051b232
......@@ -3,10 +3,8 @@ all : wrspec.pdf
.PHONY : all clean
wrspec.pdf : wrspec.tex
latex $^
latex $^
dvips wrspec
ps2pdf wrspec.ps
pdflatex -dPDFSETTINGS=/prepress -dSubsetFonts=true -dEmbedAllFonts=true -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 $^
pdflatex -dPDFSETTINGS=/prepress -dSubsetFonts=true -dEmbedAllFonts=true -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 $^
clean :
rm -f *.eps *.pdf *.dat *.log *.out *.aux *.dvi *.ps *.toc
......
documents/specifications/WR-spec/from_tomeks_msc.tex
View file @ 3051b232
......@@ -9,7 +9,7 @@ prerequisite for achieving the required synchronization accuracy. The model
of a WR optical link is depicted in Figure~\ref{fig:link_model}.
\begin{figure}[ht!]
\centering
\includegraphics[width=15cm]{protocol/link_model.eps}
\includegraphics[width=15cm]{protocol/link_model.pdf}
\caption{Model of a WR link (a) and relations between master and slave
clocks (b)}
\label{fig:link_model}
......@@ -61,7 +61,7 @@ recovered clock (deriving $phase_{S}$ from $offset_{MS}$) to match the phase
of the master clock, completing the synchronization.
\begin{figure}[ht!]
\centering
\includegraphics[width=15cm]{protocol/sync_flow.eps}
\includegraphics[width=15cm]{protocol/sync_flow.pdf}
\caption{WR synchronization flow (DMTD is explained in Appendix~\ref{s:dmtd})}
\label{fig:sync_flow}
\end{figure}
......@@ -85,7 +85,7 @@ During the first two steps of the synchronization flow
and message exchanges which result in a syntonized link.
\begin{figure}[ht!]
\centering
\includegraphics[width=7cm]{protocol/link_detect_and_syntonization.eps}
\includegraphics[width=7cm]{protocol/link_detect_and_syntonization.pdf}
\caption{WR Link detection and syntonization}
\label{fig:link_detect_and_syntonization}
\end{figure}
......@@ -121,7 +121,7 @@ single-cycle timestamping accuracy, which is necessary for reliably merging the
coarse delay with the $phase_{MM}$ phase shift during fine delay calculation.
\begin{figure}[ht!]
\centering
\includegraphics[width=17cm]{protocol/coarse_measurement.eps}
\includegraphics[width=17cm]{protocol/coarse_measurement.pdf}
\caption{Structure of a WR timestamping unit (TSU)}
\label{fig:coarse_measurement}
\end{figure}
......@@ -159,7 +159,7 @@ clocks are jittery, the transitions may sometimes occur in reverse order,
producing an erroneous timestamp of value 1.
\begin{figure}[ht!]
\centering
\includegraphics[width=10cm]{protocol/ts_jitter.eps}
\includegraphics[width=10cm]{protocol/ts_jitter.pdf}
\caption{Timestamping errors caused by clock jitter}
\label{fig:ts_jitter}
\end{figure}
......@@ -174,7 +174,7 @@ ensures that at least one of the timestamps is valid at any moment
current phase shift between clocks (see section \ref{s:fine_delay}).
\begin{figure}[ht!]
\centering
\includegraphics[width=12cm]{protocol/ts_dualedge.eps}
\includegraphics[width=12cm]{protocol/ts_dualedge.pdf}
\caption{Dual-edge timestamping in WR}
\label{fig:ts_dualedge}
\end{figure}
......@@ -200,7 +200,7 @@ The fine delay measurements in WR are based on a Dual Mixer Time Difference
DMTD technology will be presented.
\begin{figure}[ht!]
\centering
\includegraphics[width=11cm]{misc/analog_dmtd.eps}
\includegraphics[width=11cm]{misc/analog_dmtd.pdf}
\caption{Structure of an analog DMTD phase detector}
\label{fig:analog_dmtd}
\end{figure}
......@@ -238,7 +238,7 @@ analog mixing operation can be transformed into a digital sampling operation,
resulting in a digital DMTD detector, shown on fig. \ref{fig:digital_dmtd}.
\begin{figure}[ht!]
\centering
\includegraphics[width=12cm]{misc/dmtd.eps}
\includegraphics[width=12cm]{misc/dmtd.pdf}
\caption{Structure of a digital DMTD phase detector}
\label{fig:digital_dmtd}
\end{figure}
......@@ -250,7 +250,7 @@ equivalent to analog mixing (\ref{eq:mixing2}), but the principle of a DDMTD
can be explained in a more intuitive way.
\begin{figure}[ht!]
\centering
\includegraphics[width=15cm]{misc/dmtd_vernier.eps}
\includegraphics[width=15cm]{misc/dmtd_vernier.pdf}
\caption{A vernier (a) and signals generated by DDMTD (b)}
\label{fig:dmtd_vernier}
\end{figure}
......@@ -282,7 +282,7 @@ required, even a PLL integrated inside an FPGA can be used, eliminating all
external components.
\begin{figure}[ht!]
\centering
\includegraphics[width=8cm]{misc/dmtd_glitches.eps}
\includegraphics[width=8cm]{misc/dmtd_glitches.pdf}
\caption{Glitches in the DMTD output caused by clock jitter}
\label{fig:dmtd_glitches}
\end{figure}
......@@ -336,7 +336,7 @@ delay was simulated using the slave's phase shifter.
\end{table}
\begin{figure}[ht!]
\centering
\includegraphics[width=13cm]{protocol/merging_timestamps.eps}
\includegraphics[width=13cm]{protocol/merging_timestamps.pdf}
\caption{Algorithm for enhancing coarse timestamps with DMTD phase.}
\label{fig:merging_timestamps}
\end{figure}
......@@ -373,7 +373,7 @@ final output of the merging algorithm is shown in \ref{fig:merging_example}
as the thick navy trace.
\begin{figure}[ht!]
\centering
\includegraphics[width=12cm]{protocol/merging_example.eps}
\includegraphics[width=12cm]{protocol/merging_example.pdf}
\caption{Example of $t_{4p}$ timestamp enhancing.}
\label{fig:merging_example}
\end{figure}
......@@ -416,7 +416,7 @@ asymmetry),
\end{itemize}
\begin{figure}[ht!]
\centering
\includegraphics[width=\textwidth]{protocol/asymmetries.eps}
\includegraphics[width=\textwidth]{protocol/asymmetries.pdf}
\caption{Delay asymmetries in WR optical link.}
\label{fig:asymmetries}
\end{figure}
......@@ -540,7 +540,7 @@ because of these optimizations, PHYs may not keep constant transmit/receive
latencies. The problem is illustrated in Figure~\ref{fig:phy_asymmetry}.
\begin{figure}[ht!]
\centering
\includegraphics[width=11cm]{protocol/phy_asymmetry.eps}
\includegraphics[width=11cm]{protocol/phy_asymmetry.pdf}
\caption{Random delays in gigabit SerDes devices (a) and blocks causing them
(b).}
\label{fig:phy_asymmetry}
......@@ -573,7 +573,7 @@ switch) is shown in Figure~\ref{fig:phy_latency_measurement}.
\begin{figure}[ht!]
\centering
% \includegraphics[width=\textwidth]{fig/tomeksDrawings/phy_latency_measurement.eps}
\includegraphics[width=0.60\textwidth]{misc/calibration_1.ps}
\includegraphics[width=0.60\textwidth]{misc/calibration_1.pdf}
\caption{PHY latency measurement using calibration patterns.}
\label{fig:phy_latency_measurement}
\end{figure}
......@@ -647,7 +647,7 @@ of Sync-E and only the clock offset needs to be corrected. Offset correction
is split into 3 steps:
\begin{figure}[ht!]
\centering
\includegraphics[width=\textwidth]{protocol/adjustment_and_servo.eps}
\includegraphics[width=\textwidth]{protocol/adjustment_and_servo.pdf}
\caption{WR slave offset adjustment (a) and clock servo (b)}
\label{fig:adjustment_and_servo}
\end{figure}
......
documents/specifications/WR-spec/wrspec.tex
View file @ 3051b232
......@@ -83,7 +83,7 @@
\begin{figure}[ht!]
\centering
\vspace{1.3cm}
\includegraphics[width=0.50\textwidth]{logo/WRlogo.ps}
\includegraphics[width=0.50\textwidth]{logo/WRlogo.pdf}
\label{fig:wr_logo}
\end{figure}
......@@ -227,7 +227,7 @@ and time retrieved from the upstream link to all the downstream links.
\begin{figure}[ht!]
\centering
% \vspace{-1.3cm}
\includegraphics[width=0.60\textwidth]{network/wrTopology.eps}
\includegraphics[width=0.60\textwidth]{network/wrTopology.pdf}
\caption{White Rabbit network; it forms a hierarchical topology.}
\label{fig:wrNetwork}
\end{figure}
......@@ -264,7 +264,7 @@ which is the case in White Rabbit.
\begin{figure}[ht!]
\centering
\includegraphics[width=0.30\textwidth]{protocol/ptpMSGs.ps}
\includegraphics[width=0.30\textwidth]{protocol/ptpMSGs.pdf}
\caption{PTP messages used by WRPTP.}
\label{fig:wrPTPmsgs}
\end{figure}
......@@ -355,7 +355,7 @@ section~\ref{sec:physcorr} provides such an equation obtained empirically for on
\begin{figure}[ht!]
\centering
\includegraphics[width=0.95\textwidth]{protocol/delaymodel.eps}
\includegraphics[width=0.95\textwidth]{protocol/delaymodel.pdf}
\caption{Delay model of a WR link. The timestamps are accurately corrected
for link asymmetries by the usage of the four fixed delays
$\Delta_{\{tx_m, rx_s, tx_s, rx_m\}}$ and the relationship
......@@ -465,7 +465,7 @@ An example hardware implementation is described in detail in Appendix~\ref{sec:s
\begin{figure}[ht!]
\centering
\includegraphics[width=0.9\textwidth]{protocol/clocksHwSpec.ps}
\includegraphics[width=0.9\textwidth]{protocol/clocksHwSpec.pdf}
\caption{WR protocol and WR Hardware overview.}
\label{fig:clocksHwSpec}
\end{figure}
......@@ -580,7 +580,7 @@ the standard PTP protocol will be used for synchronization.
\begin{figure}[ht!]
\centering
% \vspace{-1.3cm}
\includegraphics[width=0.8\textwidth]{network/hybrid.ps}
\includegraphics[width=0.8\textwidth]{network/hybrid.pdf}
\caption{Hybrid WR/IEEE1588 network. White Rabbit nodes work
transparently with PTP nodes. WR ordinary clock 3 is more accurately
synchronized to the grandmaster than WR ordinary clock 2, which
......@@ -592,7 +592,7 @@ the standard PTP protocol will be used for synchronization.
\begin{figure}[ht!]
\centering
% \vspace{-1.3cm}
\includegraphics[width=0.99\textwidth]{protocol/wrptpMSGs_1.ps}
\includegraphics[width=0.99\textwidth]{protocol/wrptpMSGs_1.pdf}
\caption{Simplified overview of the message flow in WRPTP.}
\label{fig:wrptpMSGs}
\end{figure}
......@@ -1071,7 +1071,7 @@ backupParentDS data set.
\begin{figure}[ht!]
\centering
\includegraphics[width=0.85\textwidth]{protocol/SDA.ps}
\includegraphics[width=0.85\textwidth]{protocol/SDA.pdf}
\caption{Modified State Decision Algorithm (modifications in red).}
\label{fig:modifiedSDA}
\end{figure}
......@@ -1522,7 +1522,7 @@ WR Master and WR Slave.
\begin{figure}[ht!]
\centering
\includegraphics[width=0.85\textwidth]{protocol/modifiedPtpFSM.ps}
\includegraphics[width=0.85\textwidth]{protocol/modifiedPtpFSM.pdf}
\caption{Modified PTP Finite State Machine.}
\label{fig:modifiedPtpFSM}
\end{figure}
......@@ -1678,7 +1678,7 @@ WR\_LINK\_ON & Upon entering this state, the WR Master sends the WR\_LINK
\begin{figure}[ht!]
\centering
% \vspace{-1.3cm}
\includegraphics[width=1.00\textwidth]{protocol/wrFSM.eps}
\includegraphics[width=1.00\textwidth]{protocol/wrFSM.pdf}
\caption{White Rabbit state machine.}
\label{fig:wrFSM}
\end{figure}
......@@ -2022,7 +2022,7 @@ WRPTP shall implement the following implementation-specific features:
\begin{figure}[ht!]
\centering
\includegraphics[width=0.8\textwidth]{protocol/ptpFSM.ps}
\includegraphics[width=0.8\textwidth]{protocol/ptpFSM.pdf}
\caption{State machine for a full implementation of PTP (Figure 23, IEEE1588).}
\label{fig:ptpFSM}
\end{figure}
......@@ -2183,7 +2183,7 @@ The citation is approved by the author.
\begin{figure}[ht!]
\centering
% \vspace{-1.3cm}
\includegraphics[width=1.0\textwidth]{protocol/wrMSGsExchangeFlow.ps}
\includegraphics[width=1.0\textwidth]{protocol/wrMSGsExchangeFlow.pdf}
\caption{Typical flow of events (no exceptions) during WR Link Setup.}
\label{fig:wrFSMcommun}
\end{figure}
......@@ -2196,7 +2196,7 @@ The citation is approved by the author.
\begin{figure}[ht!]
\centering
% \vspace{-1.3cm}
\includegraphics[width=1.0\textwidth]{protocol/ptpAndWrFSMs.ps}
\includegraphics[width=1.0\textwidth]{protocol/ptpAndWrFSMs.pdf}
\caption{PTP and WR FSMs from POWER ON use case}
\label{fig:wrFSMcommun}
\end{figure}
......
documents/specifications/robustness/robustness_doc/Makefile
View file @ 3051b232
......@@ -3,10 +3,9 @@ all : robustness.pdf
.PHONY : all clean
robustness.pdf : robustness.tex
latex $^
latex $^
dvips robustness
ps2pdf robustness.ps
pdflatex -dPDFSETTINGS=/prepress -dSubsetFonts=true -dEmbedAllFonts=true -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 $^
pdflatex -dPDFSETTINGS=/prepress -dSubsetFonts=true -dEmbedAllFonts=true -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 $^
clean :
rm -f *.eps *.pdf *.dat *.log *.out *.aux *.dvi *.ps *.toc
......
documents/specifications/robustness/robustness_doc/app10.tex
View file @ 3051b232
......@@ -2,7 +2,7 @@
\label{appH}
\begin{center}
\includegraphics[scale=0.30]{robustness/switchRouting.ps}
\includegraphics[scale=0.30]{robustness/switchRouting.pdf}
\captionof{figure}{WR Switch routing using Swcore and RTU (not to
scale).}
\label{fig:swRouting}
......
documents/specifications/robustness/robustness_doc/app3.tex
View file @ 3051b232
......@@ -80,7 +80,7 @@ Backup & Designated \\ \hline
\end{table}
\begin{center}
\includegraphics[scale=0.20]{robustness/wrRSTP.ps}
\includegraphics[scale=0.20]{robustness/wrRSTP.pdf}
\captionof{figure}{WR RSTP for HP Traffic}
\label{fig:wrRSTP}
\end{center}
documents/specifications/robustness/robustness_doc/app4.tex
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......@@ -13,7 +13,7 @@ Designated Switched, which forwards packets from the LAN toward the root bridge,
and vice versa.
\begin{center}
\includegraphics[scale=0.20 ]{robustness/network_beginning.ps}
\includegraphics[scale=0.20 ]{robustness/network_beginning.pdf}
\captionof{figure}{Redundant Network with Loops}
\label{fig:redunt_net}
\end{center}
......@@ -53,7 +53,7 @@ Alternate or Backup Port.
\begin{center}
\includegraphics[scale=0.20 ]{robustness/network_spanning.ps}
\includegraphics[scale=0.20 ]{robustness/network_spanning.pdf}
\captionof{figure}{Free-Loops Network}
\label{fig:free_loops}
\end{center}
......@@ -92,7 +92,7 @@ Designated Switched, which forwards packets from the LAN toward the root bridge,
and vice versa.
\begin{center}
\includegraphics[scale=0.20 ]{robustness/network_beginning.ps}
\includegraphics[scale=0.20 ]{robustness/network_beginning.pdf}
\captionof{figure}{Redundant Network with Loops}
\label{fig:redunt_net}
\end{center}
......@@ -132,7 +132,7 @@ Alternate or Backup Port.
\begin{center}
\includegraphics[scale=0.20 ]{robustness/network_spanning.ps}
\includegraphics[scale=0.20 ]{robustness/network_spanning.pdf}
\captionof{figure}{Free-Loops Network}
\label{fig:free_loops}
\end{center}
......@@ -219,7 +219,7 @@ out its ports. Though not strictly necessary in this case, they cause no ill
effects.
\begin{center}
\includegraphics[scale=0.70 ]{robustness/dual_link.ps}
\includegraphics[scale=0.70 ]{robustness/dual_link.pdf}
\captionof{figure}{Convergence Dual Link Topology}
\label{fig:idual_link}
\end{center}
......@@ -239,7 +239,7 @@ bounces back and goes till C to adapt to the new information and will declare
the designated port as root port.
\begin{center}
\includegraphics[scale=0.70 ]{robustness/indirect_change_explamation.ps}
\includegraphics[scale=0.70 ]{robustness/indirect_change_explamation.pdf}
\captionof{figure}{Convergence Indirect Change of Topology}
\label{fig:indirect_change}
\end{center}
......@@ -247,44 +247,44 @@ the designated port as root port.
\section{White Rabbit RSTP Use Cases}
\begin{center}
\includegraphics[scale=0.40]{robustness/WRRSTPforHP.ps}
\includegraphics[scale=0.40]{robustness/WRRSTPforHP.pdf}
\captionof{figure}{Some topology of the network and the bit we are
considering.}
\label{fig:WRRSTPforHP}
\end{center}
\begin{center}
\includegraphics[scale=0.40]{robustness/WRRSTPforHP2.ps}
\includegraphics[scale=0.40]{robustness/WRRSTPforHP2.pdf}
\captionof{figure}{The considered fragment of the network.}
\label{fig:WRRSTPforHP2}
\end{center}
\begin{center}
\includegraphics[scale=0.40]{robustness/WRRSTPcase1.ps}
\includegraphics[scale=0.40]{robustness/WRRSTPcase1.pdf}
\captionof{figure}{Link failure Use Case.}
\label{fig:WRRSTPcase1}
\end{center}
\begin{center}
\includegraphics[scale=0.40]{robustness/WRRSTPcase2.ps}
\includegraphics[scale=0.40]{robustness/WRRSTPcase2.pdf}
\captionof{figure}{Switch failure Use Case.}
\label{fig:WRRSTPcase2}
\end{center}
\begin{center}
\includegraphics[scale=0.40]{robustness/WRRSTPcase3.ps}
\includegraphics[scale=0.40]{robustness/WRRSTPcase3.pdf}
\captionof{figure}{Link failure Use Case.}
\label{fig:WRRSTPcase3}
\end{center}
\begin{center}
\includegraphics[scale=0.40]{robustness/WRRSTPcase4.ps}
\includegraphics[scale=0.40]{robustness/WRRSTPcase4.pdf}
\captionof{figure}{Failure of the switch connected to Data Master Node
(assuming flawless switching to backup Data Master.}
\label{fig:WRRSTPcase4}
\end{center}
\begin{center}
\includegraphics[scale=0.40]{robustness/WRRSTPcase5.ps}
\includegraphics[scale=0.40]{robustness/WRRSTPcase5.pdf}
\captionof{figure}{Link Failure between switches connected to
Master Node and backup Master Node}
\label{fig:WRRSTPcase5}
......
documents/specifications/robustness/robustness_doc/app6.tex
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......@@ -254,7 +254,7 @@ it is necessary to multiply the received vector of $n$ block code by the $n \tim
\subsection{WR FEC Graps in CERN Network}
\begin{center}
\includegraphics[scale=0.60]{robustness/P_error_control_msg_CERN.ps}
\includegraphics[scale=0.60]{robustness/P_error_control_msg_CERN.pdf}
\captionof{figure}{Probability of Losing a Control Message}
\label{fig:wrRSTPtopologies}
\end{center}
......@@ -263,7 +263,7 @@ The Figure ~\ref{fig:wrRSTPtopologies} compares the FEC scheme proposed with a s
\begin{center}
\includegraphics[scale=0.60]{robustness/overhead_cern.ps}
\includegraphics[scale=0.60]{robustness/overhead_cern.pdf}
\captionof{figure}{Overhead introduced by the WR FEC Scheme}
\label{fig:wrRSTPtopologies}
\end{center}
......@@ -274,7 +274,7 @@ The Figure ~\ref{fig:wrRSTPtopologies} compares the FEC scheme proposed with a s
\begin{center}
\includegraphics[scale=0.60]{robustness/P_error_control_msg_GSI.ps}
\includegraphics[scale=0.60]{robustness/P_error_control_msg_GSI.pdf}
\captionof{figure}{Probability of Losing a Control Message}
\label{fig:wrRSTPtopologies}
\end{center}
......@@ -283,7 +283,7 @@ The Figure ~\ref{fig:wrRSTPtopologies} compares the FEC scheme proposed with a s
The Figure ~\ref{fig:wrRSTPtopologies} compares the FEC scheme proposed with a simple repetition code.
\begin{center}
\includegraphics[scale=0.60]{robustness/overhead_gsi.ps}
\includegraphics[scale=0.60]{robustness/overhead_gsi.pdf}
\captionof{figure}{Overhead introduced by the WR FEC Scheme}
\label{fig:wrRSTPtopologies}
\end{center}
......
documents/specifications/robustness/robustness_doc/chap2.tex
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......@@ -42,7 +42,7 @@ implementation of WR Switches and suggest improvements to help achieve the
demanding requirements.
\begin{center}
\includegraphics[scale=0.30]{robustness/switchRouting.ps}
\includegraphics[scale=0.30]{robustness/switchRouting.pdf}
\captionof{figure}{WR Switch routing using Swcore and RTU (not to
scale).}
\label{fig:swRouting}
......@@ -70,7 +70,7 @@ minimum level. The same applies to the rest of CoS.
\begin{figure}[!ht]
\centering
\includegraphics[scale=0.30]{robustness/VLAN_Tag_GigaPeek.ps}
\includegraphics[scale=0.30]{robustness/VLAN_Tag_GigaPeek.pdf}
\caption{VLAN Tags}
\label{fig:VLAN_Tag}
\end{figure}
......@@ -181,7 +181,7 @@ of \HP\ Packages}& \textbf{Transmission Time of \HP\ Package}\\ \hline
\end{table}
\begin{center}
\includegraphics[scale=0.35]{robustness/CMdelayStandard.ps}
\includegraphics[scale=0.35]{robustness/CMdelayStandard.pdf}
\captionof{figure}{Delivery Delay of \ControlMessage\ (not to scale),
for description how the numbers were obtained, see Appendix~\ref{appH}.}
\label{fig:CMdelayStandard}
......@@ -275,7 +275,7 @@ called
\StandardPriority\ Packages (\SP\ Packages).
\begin{center}
\includegraphics[scale=0.30]{robustness/SWhpRouting.ps}
\includegraphics[scale=0.30]{robustness/SWhpRouting.jpg}
\captionof{figure}{Difference between \HP\ and \SP\ Routing (not to
scale).}
\label{fig:swhprouting}
......@@ -329,7 +329,7 @@ Master, thus they have precedence over \HP\ Packages received from downlink
port.
\begin{center}
\includegraphics[scale=0.30]{robustness/hpRouting.ps}
\includegraphics[scale=0.30]{robustness/hpRouting.pdf}
\captionof{figure}{Algorithm for routing \HP\ Traffic.}
\label{fig:timePaths}
\end{center}
......@@ -360,7 +360,7 @@ Delivery Delay}}\\
\begin{center}
\includegraphics[scale=0.30]{robustness/CMdelayHP.ps}
\includegraphics[scale=0.30]{robustness/CMdelayHP.pdf}
\captionof{figure}{Delivery Delay of \ControlMessage\ using \HP\
Bypass.}
\label{fig:CMdelayHP}
......
documents/specifications/robustness/robustness_doc/chap3.tex
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......@@ -57,7 +57,7 @@ mentioned before, WR Timing Slave Switch can be connected to up to two links
to up to two WR Timing Master Switches.
\begin{center}