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\title[White Rabbit\hspace{3em}\insertframenumber/\inserttotalframenumber]{White Rabbit}
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\author{Maciej Lipi\'{n}ski}
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\institute{CERN BE-CO\\Hardware and Timing section}
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\date[4 July 2018]{European Frequency and Time Seminar\\Besançon, 4 July 2019}
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\AtBeginSection[]
{
  \begin{frame}<beamer>{Outline}
    \tableofcontents[currentsection]
  \end{frame}
}

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\begin{frame}<beamer>{Outline}
  \tableofcontents
\end{frame}

\section{Introduction}
\subsection{}
%=======================
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\begin{frame}{What is White Rabbit [1]?}
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\begin{columns}[c]
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	\column{0.75\textwidth}
\small
% \textcolor{white}{dddd dsaf asd fasd fdsa fads f dsa fdsa f dsaf dsa fdsa f dsaf dsaf fds}
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	  \begin{itemize}
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		\item<1-> Initiated to renovate accelerator's ctrl \& timing
		\item<2-> Based on well-established standards
		\begin{itemize}\footnotesize
		  \item <3->Ethernet \textcolor{gray}{(IEEE 802.3)}
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		  \item <3->Bridged Local Area Network \textcolor{gray}{(IEEE 802.1Q)}
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		  \item <4->Precision Time Protocol \textcolor{gray}{(IEEE 1588)}
		\end{itemize}
		\item<6->Extends standards to meet CERN requirements and provides
		\begin{enumerate}
		\item \color{blue!90}{\textbf{Sub-ns synchronization}}
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		\item \color{red}{{\textbf{Deterministic data transfer}} [2]}
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		\end{enumerate}
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    \item<7-> Initial specs: links up to 10km, $\approx$2000 nodes
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    \item<8-> Open Source with commercial support
    \item<9-> Many users worldwide, inc. metrology labs...
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	  \end{itemize}
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	\column{0.4\textwidth}
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		\begin{center}
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% 		\includegraphics<1>[width=1.0\textwidth]{additionalForPres/intro-1.jpg}
		\includegraphics<3>[width=1.0\textwidth]{misc/LAN.jpg}
		\includegraphics<4>[width=1.0\textwidth]{misc/ieee-1588-ptp-example.jpg}
		\includegraphics<5>[width=1.0\textwidth]{network/WR_network-ethernet.pdf}
		\includegraphics<6->[width=1.0\textwidth]{network/wr_network-enhanced_pro.pdf}

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		\end{center}
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	\end{columns}\small\pause\pause\pause\pause\pause\pause\pause\pause
	     \url{https://www.ohwr.org/projects/white-rabbit/}
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\end{frame}
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\begin{frame}{Open \textbf{and} commercially available off-the-shelf}
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\includegraphics[width=1.0\textwidth]{misc/WR-zoo.jpg}\vspace{-1cm}
 \begin{center}
 \small
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 \textbf{Companies selling White Rabbit [3]:} \url{www.ohwr.org/projects/white-rabbit/wiki/wrcompanies}
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 \end{center}
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\end{frame}
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\begin{frame}{White Rabbit application examples}
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% \small
\footnotesize
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  \begin{columns}[c]
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    \column{0.72\textwidth}
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  \begin{itemize}
      \item<1-> \color<2->{black!50}{CERN and GSI}
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      \item<2-> \color<3->{black!50}{The Large High Altitude Air Shower Observatory}
      \item<3-> \color<4->{black!50}{KM3NET: European deep-sea neutrino telescope}
      \item<4-> \color<5->{black!50}{German Stock Exchange}
      \item<5-> Metrology laboratories
\begin{table}
\tiny
\begin{tabular}{
|      c         |         c        |       c          |       c        | } \hline
\textbf{Time Lab}& \textbf{Country} & \textbf{Link Length}& \textbf{Time Error}\\ \hline
VTT              & Finland     & 950~km           & $\pm$2ns       \\   \cline{3-4}
MIKES            &             & 50~km            & $<$1ns         \\   \hline
VSL              & Netherlands & 2x137~km         & $\approx$8ns         \\   \hline
%                  &             & 25~km            & 150ps          & 1-2ps@1000s         \\   \cline{3-5}
LNE-             &             & 25~km            & 150ps          \\   \cline{3-4}
SYRTE            & France      & 125~km           & 2.5ns          \\   \cline{3-4}
                 &             & 4x125~km         & 2.5ns          \\   \hline
NIST             & USA         & $<$10~km         & $<$200ps    \\   \hline
NLP              & UK          & 2x80~km          & $<$1ns         \\   \hline
                 &             & 50~km            & 800ps $\pm$56ps\\   \cline{3-4}
INRIM            & Italy       & 70~km            & 610ps $\pm$47ps\\   \hline
%                 & 400~km           &                &                     \\   \hline

\end{tabular}
\end{table}

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    \end{itemize}

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    \column{0.45\textwidth}    
    \begin{center}
      \includegraphics<1>[width=0.80\textwidth]{applications/gsiANDcern.pdf}
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      \includegraphics<2>[width=1\textwidth]{applications/lhaaso.pdf}
      \includegraphics<3>[width=1\textwidth]{applications/KM3NeT.pdf}
      \includegraphics<4>[width=1\textwidth]{applications/GermanStockExchange.jpg}
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    \end{center}

  \end{columns}
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  \pause\pause\pause\pause\pause
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    {\scriptsize See user page [4]: \url{http://www.ohwr.org/projects/white-rabbit/wiki/WRUsers}}
    {\scriptsize See also article [5] and newsletter [6]}
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\end{frame}

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\section{Technology}
\subsection{}

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\begin{frame}{White Rabbit technology - sub-ns synchronization}
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  \begin{block}{Based on}
    \begin{itemize}
      \item Gigabit Ethernet over fibre
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      \item IEEE 1588 Precision Time Protocol
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    \end{itemize}
  \end{block}
  \pause
  \begin{block}{Enhanced with}
    \begin{itemize}
      \item Layer 1 syntonisation
      \item Digital Dual Mixer Time Difference (DDMTD)
      \item Link delay model
    \end{itemize}
  \end{block}
\end{frame}

\begin{frame}{Precision Time Protocol (IEEE 1588)}
\begin{columns}[c]
  \column{.4\textwidth}
    \begin{center}
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      \includegraphics[height=5cm]<1>{protocol/ptp_exchange-enhanced.jpg}
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      \includegraphics[height=4cm]<2->{protocol/ptpNetwork.jpg}
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    \end{center}
  \column{.75\textwidth}
    \begin{itemize}
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	  \item Frame-based synchronisation protocol
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    \item Simple calculations:
    \begin{itemize}
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      \item link delay: $\delta_{ms} = \frac{(t_{4}-t_{1}) - (t_{3}-t_{2})}{2}$
      \item offset from master: $OFM = t_{2} - (t_{1} + \delta_{ms})$
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    \end{itemize}
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    \item<2-> Hierarchical network
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    \item<3-> Shortcomings:
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    \begin{itemize}
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      \item devices have free-running oscillators
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      \item frequency drift compensation vs. message exchange traffic
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      \item assumes symmetry of medium
      \item timestamps resolution
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    \end{itemize}
  \end{itemize}
\end{columns}
\end{frame}

\begin{frame}{Layer 1 Syntonisation}
 %\begin{block}{Common clock for the entire network}
  \begin{itemize}
    \item All network devices use the same physical layer clock.
    \item Clock is encoded in the Ethernet carrier and recovered by the receiver chip.
    \item Phase detection allows sub-ns delay measurement.
  \end{itemize}
%\end{block}
\vspace{-0.2cm}
  \begin{center}
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  \includegraphics[height=4.5cm]<1>{misc/synce_v3.pdf}
  \includegraphics[height=4.5cm]<2>{p1588/1588-ha-L1vsPTP-simplified.jpg}
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  \end{center}
\end{frame}

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\begin{frame}{Digital Dual Mixer Time Difference (DDMTD)}
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  \begin{itemize}
    \item Used for precise phase measurements
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    \item Implemented in FPGA
    \item 62.5MHz WR $clk_{in}$ \& N=14 results in 
    \begin{itemize}\scriptsize
      \item $f_{DDMTD}=62.496185MHz$
      \item $clk_{out}~~=3.814kHz$
    \end{itemize}
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    \item Theoretical resolution of 0.977ps
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  \end{itemize}
  \vspace{-0.2cm}
  \begin{center}
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  \includegraphics[width=\textwidth]{misc/ddmtd_3.jpg}
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  \end{center}

\end{frame}

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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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% \begin{frame}{SoftPLL}
%   \begin{center}
%     \includegraphics[width=.9\textwidth]{protocol/dmpll_diagram-slides.pdf}
%   \end{center}
% \end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

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\begin{frame}{Link delay model}
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  \begin{columns}
    \column{.65\textwidth}
    \footnotesize
      \begin{itemize}
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        \item <1->Previous tricks allow high precision of round trip (RTT) measurement
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        \item <2->Accuracy requires mitigation of asymmetries 
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        \item <3->Asymmetry sources: FPGA, PCB, SFP electrics/optics, chromatic dispersion [7,8]
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        \item <4->Link delay model:
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        \begin{itemize}\scriptsize
          \item \textbf{Fixed delays:} assumed constant, calibrated/measured
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          \item \textbf{Variable delays:} online evaluation with fiber asymmetry coefficient:\vspace{0.1cm} $\alpha = \frac{\nu_g(\lambda_S)}{\nu_g(\lambda_M)} -1  = \frac{\delta_{MS} - \delta_{SM}}{\delta_{SM}}$
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        \end{itemize}
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        \item <5-> Accurate offset from master (OFM):\scriptsize \\\vspace{0.2cm}
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%          $RTT=(t_{4}-t_{1}) - (t_{3}-t_{2})$\\
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         $\delta_{ms}~ = \frac{1 + \alpha}{2 + \alpha} \, (RTT - \sum \Delta - \sum \epsilon)$\vspace{0.2cm}
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         $OFM = t_{2} - (t_{1} + \delta_{ms} + \Delta_{txm} + \Delta_{rxs} + \epsilon_S)$
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      \end{itemize}
  \column{.5\textwidth}
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  \begin{center}
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     \includegraphics<1-2>[width=1.0\textwidth]{protocol/link-delay-model-detailed-1.jpg}
     \includegraphics<3>[width=1.0\textwidth]{protocol/link-delay-model-detailed-2.jpg}
     \includegraphics<4->[width=1.0\textwidth]{protocol/link-delay-model-detailed-3.jpg}\\
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     \tiny See: \textit{WR Calibration} [9]
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    \end{center}
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  \end{columns}
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%   \pause\pause\pause\pause
%   \scriptsize See: \textit{WR Calibration}, version 1.1, G.Daniluk
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\end{frame}
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\section{Equipment}
\subsection{}

\begin{frame}{Typical WR network}
  \begin{center}
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		\includegraphics[width=.5\textwidth]{network/wr_network-enhanced_pro.pdf}
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  \end{center}
\end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\begin{frame}[t,fragile]{White Rabbit Switch [10]}
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	\begin{center}
		\includegraphics[width=\textwidth]{switch/wrSwitch_v3_3.jpg}
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		\begin{itemize}\small
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			\item Central element of WR network
			\item 18 port gigabit Ethernet switch with WR features
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			\item Default Optical transceivers: up to 10km, single-mode fiber
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      \item Fully open, commercially available from 4 companies
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		\end{itemize}
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	\end{center}
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	\begin{center}\scriptsize
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	 NOTE: Work started on a new switch with 10 gigabit Ethernet 
	 \end{center}
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\end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\begin{frame}{Simplified block diagram of the hardware}
	\vspace{-0.3cm}
  \begin{center}
    \includegraphics[width=.85\textwidth]{switch/switch3_4_simple_diagram_h.pdf}
  \end{center} 
\end{frame}
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\begin{frame}{Open \textbf{and} commercially available off-the-shelf}
		\includegraphics[width=\textwidth]{misc/WR-zoo.jpg}
\end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\begin{frame}{WR Node [11, 12]: carrier board + FMC}
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\vspace{-0.5cm}
\begin{center}
    \includegraphics[width=10cm]{node/shw_kit2.png}
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    \end{center}

  \begin{columns}[c]
    \column{.01\textwidth}
    \column{.98\textwidth}
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\vspace{-0.5cm}
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	\begin{block}{FMC-based Hardware Kit}
	  \begin{itemize}
%	  \item Carrier boards in PCI-Express, VME, PXIe
	  \item All carrier cards are equipped with a White Rabbit port.
	  \item Mezzanines can use the accurate clock signal and ``TAI''
		\\ (synchronous sampling clock, trigger time tag, ...).
	  \end{itemize}
	\end{block}

    \column{.01\textwidth}
  \end{columns}
\end{frame}
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% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% \begin{frame}{White Rabbit PTP Core [11]}
%  \begin{center}
%    \includegraphics[width=\textheight]{node/wrNode.jpg}
%    \end{center}
% \end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\section{Performance}
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\subsection{Current}
\begin{frame}{WR time transfer performance: basic test setup}

    \begin{center}
    \includegraphics[height=7.0cm]{measurements/meas_setup.pdf}
    \end{center}

\end{frame}

\begin{frame}{WR time transfer performance: test results}

    \begin{center}
    \includegraphics[height=6.0cm]{measurements/meas_results2.pdf}\\
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    Reported in 2011 in [13]
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    \end{center}

\end{frame}
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\subsection{Improvements}
\begin{frame}{Performance limits and improvements}

    \begin{center}
    \includegraphics<1>[width=\textwidth]{misc/inaccuracy-sources.jpg}
    \includegraphics<2>[width=\textwidth]{misc/inaccuracy-sources-fixed-delays.jpg}
    \end{center}

\end{frame}

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\begin{frame}{Hardware asymmetry compensation}
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%  \begin{center}\vspace{-0.3cm}
%    \includegraphics<1-2>[height=2.3cm]{misc/inaccuracy-sources-fixed-delays.jpg}
%    \includegraphics<3>[height=2.3cm]{protocol/bitslide.jpg}
%    \includegraphics<4->[height=2.3cm]{misc/inaccuracy-sources-fixed-delays.jpg}
%    \end{center}
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\begin{columns}[c]
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    \column{0.65\textwidth}\vspace{-0.5cm}
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      \begin{itemize}\scriptsize
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         \item<1-> \textbf{PCB, FPGA, SFP} -- hardware delay uncertainty
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         \begin{itemize}\scriptsize
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           \item Calibration uncertainty: sdev of 2ps [8]
           \item Linear dependency on temperature\\ (700ps over $-10..55^oC$ [7]):
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           \begin{itemize}\tiny
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             \item CuteWR: tx $-8.4ps/K$, rx $13.3ps/K$ [7]
             \item Switch: 8ps/K [8]
             \item WR-Zen: 4ps/K [8]
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           \end{itemize}
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           \item Remedy: active compensation \\(for LHASSO, 50ps over $-10..55^oC$ [7])
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%            \item SFP delay dependency on input power, error up to 30ps [2]
         \end{itemize}
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         \item<2-> \textbf{Bitslide} -- measurement uncertainty
         \begin{itemize}\scriptsize
           \item Measured each time link goes up
           \item Value provided by GTX of FPGA
           \item Error: $\pm$35ps for GTX
           \item Remedy: ensure bitslide is zero \\(ongoing work at CERN)
         \end{itemize}
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    \end{itemize}
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  \column{0.5\textwidth}
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 \begin{center}
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   \includegraphics<2>[width=\textwidth]{protocol/bitslide.jpg}
   \includegraphics<1>[width=\textwidth]{measurements/fixed-delays-temp-dependency.jpg}\\
   \tiny
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   \textcolor<2>{white}{Figure source: [7]}
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   \end{center}
\end{columns}
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\end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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\begin{frame}{Performance limits and improvements}

    \begin{center}
    \includegraphics[width=\textwidth]{misc/inaccuracy-sources-variable-delays.jpg}
    \end{center}
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    \begin{center}
    \pause
    $\alpha = \frac{\nu_g(\lambda_S)}{\nu_g(\lambda_M)} -1  = \frac{\delta_{MS} - \delta_{SM}}{\delta_{SM}}$\\\vspace{0.2cm}
    $\delta_{ms}~ = \frac{1 + \alpha}{2 + \alpha} \, (RTT - \sum \Delta - \sum \epsilon)$
    \end{center}
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\end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\begin{frame}{Medium asymmetry compensation}
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%  \begin{center}\vspace{-0.3cm}
%    \includegraphics[height=2.3cm]{misc/inaccuracy-sources-variable-delays.jpg}
%    \end{center}
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\begin{columns}[c]
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    \column{0.71\textwidth}\vspace{-0.5cm}
    \textcolor{white}{dddd\\dddd}
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        \begin{itemize}\scriptsize
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          \item<1-> \textbf{SFP} -- tx wavelength uncertainty
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          \begin{itemize}\scriptsize
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            \item<2-> IEEE802.3ah allows nominal value departures\\(10nm at 1490nm, 50nm at 1310nm)
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            \item<3-> Linear dependency on SFP temp:
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            \begin{itemize}\tiny
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              \item 1310nm: $0.4~~\sim0.5~~nm/K$ $\Rightarrow$ $~~~0.11 ps/(K \cdot km)$ [7]
              \item 1490nm: $0.09\sim0.12 nm/K$ $\Rightarrow$ $-0.51 ps/(K \cdot km)$ [7]
              \item 1550nm: ~~~~~~~~~$\approx0.1~~nm/K$ $\Rightarrow$ $~~~1.7~~ps/(K \cdot km)$ [8]
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            \end{itemize}
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%             \begin{itemize}\tiny
%               \item 1310nm: $0.4\sim0.5 nm/K$ (AXGE-1254 SFP) [6]
%               \item 1490nm: $0.09\sim0.12 nm/K$ (AXGE-3454 SFP) [6]
%               \item 1550nm: $\approx0.1 nm/K$ [7]
%             \end{itemize}
%             \begin{itemize}\tiny
%               \item 1310nm: $0.4\sim0.5 nm/K$, for G.652.D fiber: $0.11 ps/(K \cdot km)$ [6]
%               \item 1490nm: $0.09\sim0.12 nm/K$, for G.652.D fiber: $-0.51 ps/(K \cdot km)$ [6]
%               \item 1550nm: $0.1 nm/K$, for G.652.D fiber:$1.7ps/(K \cdot km)$ [7]
%             \end{itemize}
%             \item<4-> SFP temp-dependency for G652.D fiber:
%             \begin{itemize}\tiny
%               \item 1310nm: $0.11 ps/(K \cdot km)$ [6]
%               \item 1490nm: $-0.51 ps/(K \cdot km)$ [6]
%               \item 1550nm: $1.7ps/(K \cdot km)$ [7]
%             \end{itemize}

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          \end{itemize}
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          \item<5-> \textbf{Fiber} -- chromatic dispersion variation
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          \begin{itemize}\scriptsize
            \item Linear dependency on fiber temp:
            \begin{itemize}\tiny
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              \item G.652.D at 1310/1490: $-0.2 ~~ps/(K\cdot km)$ [7]
              \item G.652.D at 1310/1490: $-0.12 ps/(K\cdot km)$ [7]
              \item G.652.D at 1490/1550: $-0.05 ps/(K\cdot km)$ [8]
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             \end{itemize}
          \end{itemize}
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          \item<6-> Significant for links $>10km$ 
          \item<7-> Remedy: temp-stabilized SFP, closer wavelength \\(C21\& C23 @ 1560.61 \& 1558.98 in SKA [8])
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        \end{itemize}
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\textcolor{white}{dddd\\dddd\\dddd\\dddd}
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  \column{0.45\textwidth}
 \begin{center}\vspace{-0.5cm}
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   \includegraphics<4>[width=0.8\textwidth]{measurements/sfp-temp-dependence.jpg}
   \includegraphics<5>[width=\textwidth]{measurements/fiber-temp-dependency.jpg}
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%    \includegraphics<5->[width=\textwidth]{applications/SKA-DWDM.jpg}
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   \includegraphics<6->[width=\textwidth]{measurements/PBowen-link-errors.jpg}\textcolor{white}{d}\\
    \textcolor<1-3,5->{white}{\tiny Figure source: [7]}\\
    \textcolor<1-4>{white}{\tiny Figure source: [8]}
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%    \tiny\pause\pause\pause
%    Figure source: [1]
   \end{center}
\end{columns}

\end{frame}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\begin{frame}{Frequency transfer}
 \begin{center}\vspace{-0.3cm}
   \includegraphics[height=2.3cm]{misc/inaccuracy-sources-freq-transfer.jpg}\\
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   \includegraphics<2>[width=.95\textwidth]{switch/wrs_v3_3_clocking_with_bandwidth.png}
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  \end{center}
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\end{frame}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\begin{frame}{Frequency transfer}
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%  \begin{center}\vspace{-0.3cm}
%    \includegraphics[height=2.3cm]{misc/inaccuracy-sources-freq-transfer.jpg}
%    \end{center}
\begin{columns}[c]
    \column{0.6\textwidth}\vspace{-0.5cm}
     \begin{itemize}\scriptsize
          \item<1-> \textbf{DDMTD}
          \begin{itemize}\scriptsize
            \item Flicker PM noise: -100 dBc at 1 Hz
            \begin{itemize}\tiny
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             \item Dominant $<$ 10Hz, 
             \item MDEV at $\tau=1s$ to 4E-13
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             \item LVDS input clock buffer and clock routing
            \end{itemize}
            \item White PM noise: -108 dBc
            \begin{itemize}\tiny
              \item Limits the phase noise to -108 dBc/Hz
              \item Thermal, DFF meta-stability, noise due to aliasing
            \end{itemize}
            \item<2-> Stability at $\tau$=1s better on\\ Kintex-7 (28nm) \& Kintex US (20nm)
          \end{itemize}
          \item<3-> \textbf{GTX} 
          \begin{itemize}\scriptsize
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            \item Flicker PM noise: -100 dBc at 1 Hz
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            \item White PM noise: -106 dBc\\ MDEV at $\tau=1s$ to 4E-13
          \end{itemize}
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          \item<4-> Remedy: none, inherent to technology
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        \end{itemize}
  \column{0.5\textwidth}
  \begin{center}\vspace{-0.5cm}
  \includegraphics<1>[width=.99\textwidth]{measurements/DDMTD-noise.jpg}
  \includegraphics<2>[width=.99\textwidth]{measurements/DDMTD-future-tech-noise.jpg}
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   \end{center}
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\end{columns}\vspace{0.1cm}
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 \begin{center}
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\tiny NOTE: Carrier is 10MHz\\
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\tiny All above data is based on [14]
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\end{center}
\end{frame}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\begin{frame}{Frequency transfer}
%  \begin{center}\vspace{-0.3cm}
%    \includegraphics[height=2.3cm]{misc/inaccuracy-sources-freq-transfer.jpg}
%    \end{center}
\vspace{0.5cm}
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\begin{columns}[c]
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    \column{0.67\textwidth}\vspace{-0.5cm}
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        \begin{itemize}\scriptsize
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          \item<1-> Accumulation of phase noise in lower frequencies
          \item<2-> \textbf{VCXO} - Boundary Clock Only
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          \begin{itemize}\scriptsize
            \item Phase noise leaking from the local oscillator
            \item Instabilities induced by cooling airflow
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            \item Remedy: increase bandwidth (see [15]) or better oscillator (see daughterboard [16])
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          \end{itemize}
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          \item<3->\textbf{External reference input} - Grandmaster only
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          \begin{itemize}\scriptsize
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            \item Noisy internal Virtex-6 MMCM PLL
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            \item Large phase noise power at 10kHz to 2MHz
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            \item Phase noise above DDMTD Nyquist (1.9kHz) bandwidth folds back to baseband
            \item Remedy: external PLL to synthesize 62.5MHz from 10MHz (see daughterboard [16])
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          \end{itemize}
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        \end{itemize}%\vspace{-0.2cm}
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    \begin{table}[ht]
    \centering
    \tiny
    \begin{tabular}{|l |       c        |     c          |   c         |     c       | c          |  }     \hline \tiny
    \textbf{Meas.}                      &  \multicolumn{5}{|c|}{\textbf{Allan Deviation (ADEV)}}     \\ \cline{2-6}
    \textbf{at}        & $\tau$=0.01 s  & $\tau$=0.1 s   & $\tau$=1 s  & $\tau$=10 s & $\tau$=100 s      \\ \cline{2-6}
                       &    [s]         &    [s]         &   [s]       &  [s]        & [s]               \\ \hline
    GM                 &    9.2e-10     &  1.3e-10       & 1.3e-11     &  1.3e-12    & 1.3e-13      \\ \hline
    SW 1               &    7.4e-10     &  1.6e-10       & 1.9e-11     &  1.9e-12    & 1.9e-13           \\ \cline{1-6}
    SW 2               &    6.9e-10     &  2.1e-10       & 2.7e-11     &  2.6e-12    & 2.6e-13           \\ \cline{1-6}
    \end{tabular}
%     \caption{Allan Deviation, equivalent noise bandwidth of 50Hz.}
    \label{tab:adev}
    \end{table}%\vspace{-0.3cm}
  \column{0.5\textwidth}
  \begin{center}\vspace{-0.5cm}\vspace{0.5cm}
  \includegraphics<1-2>[width=.99\textwidth]{measurements/phase_noise_v3_4.pdf}
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  \includegraphics<3>[width=0.98\textwidth]{switch/mmcm_noise2.jpg}
  \includegraphics<4>[width=.99\textwidth]{measurements/phase_noise_v3_4.pdf}
  \includegraphics<5>[width=.45\textheight, angle=90]{measurements/WRSlowJitter/rsz_3d_image__1_.jpg}
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\tiny
    \begin{table}[!ht]
    \centering
    \tiny
    \begin{tabular}{|       l            |          c          |         c          |     c     |}           \hline \tiny
    \textbf{Meas.}  & \multicolumn{3}{|c|}{\textbf{RMS jitter}}                     \\ \cline{2-4}
    \textbf{at}        & \textbf{1Hz-10Hz}   & \textbf{1Hz-2kHz}   & \textbf{1Hz-100kHz} \\ \hline
    GM                 &       4.7ps         &     9.0ps          & 9.1ps              \\ \hline
    SW 1               &       7.1ps         &     11.0ps         & 11.0ps             \\ \cline{1-4}
    SW 2               &       8.8ps         &     14.0ps         & 14.0ps             \\ \hline
    \end{tabular}
%     \caption{Integrated RMS jitter  in different regions of the spectrum.}
    \label{tab:phaseNoise}
    \end{table}%\vspace{-0.3cm}
 
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\end{columns}\vspace{-0.5cm}
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   \begin{center}
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    \tiny Data from [15]
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    \end{center}
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\end{frame}

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\begin{frame}{Test setup for switch with Low Jitter Daughterboard}
  \begin{center}
    \includegraphics[width=\textwidth]{measurements/WRSlowJitter/rsz_experimental_setup.png}\\
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    \tiny See more: [16]
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  \end{center}
\end{frame}


% 
% \begin{frame}{Improvements for GM: PM noise and Modified ADEV}
%   \begin{center}
%     \includegraphics[width=.5\textwidth]{measurements/WRSlowJitter/pn.png}
%     \includegraphics[width=.5\textwidth]{measurements/WRSlowJitter/mdev.png}
%   \end{center}
% \begin{itemize}\scriptsize
%   \item Jitter improvement: 9ps to $<$2ps RMS 10Hz-100kHz
%   \item ADEV improvement: 1.4E-11 to $<$5E-13 $\tau$=1s ENBW 50Hz
% \end{itemize}
% \end{frame}

\begin{frame}{Switch with LJD: PM noise and Modified ADEV}
\vspace{-0.5cm}
  \begin{center}
    \includegraphics[width=.5\textwidth]{measurements/WRSlowJitter/GM+BC_pn.jpg}
    \includegraphics[width=.45\textwidth]{measurements/WRSlowJitter/GM+BC_MDEV.jpg}
  \end{center}
\begin{itemize}\scriptsize
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  \item Jitter improvement [14, 16]
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  \begin{itemize}\scriptsize
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    \item GM: 9ps to 1ps RMS 1Hz-100kHz
    \item BC: 11ps to $<2$ps RMS 1Hz-100kHz
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  \end{itemize}
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  \item MDEV improvement [14, 16]
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  \begin{itemize}\scriptsize
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    \item GM: 2E-12 to $<$5E-13 $\tau$=1s ENBW 50Hz
    \item BC: 4E-12 to $<$7E-13 $\tau$=1s ENBW 50Hz
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  \end{itemize}

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\end{itemize}
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\end{frame}

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\section{Current developments}
\subsection{}

\begin{frame}{Current developments}
  \begin{itemize}\small
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    \item<1-> Standardization in IEEE 1588 [17]:
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    \begin{itemize}\scriptsize
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      \item High Accuracy sub-committee dedicated to WR
      \item High Accuracy, a.k.a. WR, to become a third Default PTP Profile
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      \item Revised standard expected in 2019.
    \end{itemize}
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    \item<2-> Long-haul link [18, 19]:
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    \begin{itemize}\scriptsize
      \item Triggered by National Time Labs and Radio Telescope
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      \item \textbf{Sub-ns on 80km} and \textbf{ns on 137km} links with single bidirectional fiber
      \item \textbf{$\pm$2.5ns on 950km} links with two unidirectional fibers
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    \end{itemize}
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%     \item<3-> Absolute Calibration
    \item<3-> WR-based applications
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    \begin{itemize}\scriptsize
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      \item Diagnostics and remote management of WR networks
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      \item Radio-frequency over WR for RF cavities control
      \item Distributed Oscilloscope
    \end{itemize}
  \end{itemize}
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\end{frame}
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% \begin{frame}{Current developments}
%   \begin{block}{Switches and nodes are commercially available}
%   Work now revolves around better diagnostics and remote management of WR
%   networks as well as improving the phase noise and performing extensive network stress tests.
%   \end{block}
%   \pause
%   \begin{block}{Standardisation}
%     IEEE 1588 revision process is ongoing and contains a sub-committee (High
%     Accuracy) dedicated to White Rabbit. Revised standard expected in 2019.
%   \end{block}
%   \pause
%   \begin{block}{Robustness}
%   Based on redundant information and fast switch-over between
%   redundant fibres and switches. 
%   \end{block}
% \end{frame}
% 
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\begin{frame}{RF over WR a.k.a. Distributed DDS [20]}
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  \begin{center}
    \includegraphics[width=\columnwidth]{applications/remote_dds.pdf}
  \end{center}
  \begin{block}{Distributed Direct Digital Synthesis}
    \begin{itemize}
    \item Replaces dozens of cables with a single fiber.
    \item Works over big distances without degrading signal quality.
    \item Can provide various clocks (RF of many rings and linacs) with a single, standard link.
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    \item At CERN, ongoing work to distribute 200 MHz RF with 0.25ps RMS jitter and $\pm$10ps accuracy.
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    \end{itemize}
  \end{block}
\end{frame}

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\begin{frame}{Distributed oscilloscope [21]}
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 \begin{center}
   \includegraphics[width=0.9\textwidth]{applications/distr_oscill.pdf}
   \end{center}
   \begin{block}{}
     \begin{itemize}
     \item Common clock in entire network: no skew between ADCs.
     \item Ability to sample with different clocks via Distributed DDS.
     \item External triggers can be time tagged with a TDC and used to reconstruct the original time base in the operator's PC.
     \end{itemize}
   \end{block}
\end{frame}

\section{Conclusions}
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\subsection{}
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\begin{frame}{Summary}
  \begin{itemize}
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	  \item Open source (H/W \& S/W) with commercial support
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    \pause
	  \item Standard-compatible and standard-extending
    \pause
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	  \item Active participation in IEEE1588 revision process
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    \pause
	  \item A versatile solution for general control and data acquisition
    \pause
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	  \item More applications than ever expected
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    \pause
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         \item Substantial improvements in performance
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 \end{itemize}
% \pause
%For more information see http://www.ohwr.org/projects/white-rabbit/wiki
\end{frame}

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\begin{frame}{Q\&A}
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  \begin{center}
    \includegraphics[height=4.0cm]{misc/white_rabbit_end.png}
  \end{center}
  
  \begin{center}
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    Thank you for attention!\\ Any questions?
  \end{center}  
\vspace{1cm}
  \begin{center}\scriptsize
    WR Project page: http://www.ohwr.org/projects/white-rabbit/wiki
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  \end{center}  
\end{frame}

\appendix
\backupbegin 
\begin{frame}{References}
\tiny
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%   \begin{enumerate}
%     \item \textbf{White Rabbit Project:}\url{https://www.ohwr.org/project/white-rabbit/wikis}
%     \item \textbf{Companies selling WR:}\url{https://www.ohwr.org/project/white-rabbit/wrcompanies}
%     \item \textbf{Users of WR:}\url{https://www.ohwr.org/project/white-rabbit/WRUsers}
%     \item \textbf{White Rabbit Applications and Enhancements}, M.Lipinski et. al, ISPCS2018\\\url{https://www.ohwr.org/project/white-rabbit/uploads/7f9e67258850d5c036629a509bf2e124/ISPCS2018-WRApplicatoinsAndEnhancements.pdf}
%     \item \textbf{White Rabbit Newsletter, September 2018} \\\url{https://www.ohwr.org/project/white-rabbit/wikis/newsletter-2018-09}
%     \item \textbf{Temperature Effect and Correction Method of White Rabbit Timing Link}; Hongming Li, Guanghua Gong, Weibin Pan, Qiang Du, Jianmin Li
%     \item \textbf{DWDM Stabilized Optics for White Rabbit}, Paul Boven
%     \item \textbf{WR Calibration}, version 1.1, G.Daniluk\\ \url{www.cern.ch/white-rabbit/documents/WR_Calibration-v1.1-20151109.pdf}
%     \item \textbf{White Rabbit Switch:} \url{https://www.ohwr.org/project/white-rabbit/wikis/Switch}
%     \item \textbf{White Rabbit Node:} \url{https://www.ohwr.org/project/white-rabbit/wikis/Node}
%     \item \textbf{White Rabbit PTP Core:} \url{https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core}
%     \item \textbf{White Rabbit: a PTP application for robust sub-nanosecond synchronization}, M. Lipiński et el, ISPCS2011\\\url{https://www.ohwr.org/project/white-rabbit/uploads/cfc34350adcbf5156f968fac0b9301b5/ISPCS2011_WR.pdf}
%     \item \textbf{White Rabbit Clock Synchronization: Ultimate Limits on Close-In Phase Noise and Short-Term Stability Due to FPGA Implementation}, M.Rizzi et el, UFFC-T, 2018\\\url{https://www.ohwr.org/project/white-rabbit/uploads/253cbfc17d2b43cd445b68348aee0374/Submitted_IEEE.pdf}
%     \item \textbf{White Rabbit Clock Characteristics}, M. Rizzi et el, ISPCS2016\\\url{https://www.ohwr.org/project/white-rabbit/uploads/2fa1a438446fc6c85b4540faecf1017a/ISPCS2016-WRClockCharacteristics.pdf}
%     \item \textbf{WRS Low Jitter Daughterboard:}\url{www.ohwr.org/projects/wrs-low-jitter}
%     \item \textbf{Methods to Increase Reliability and Ensure Determinism in a White Rabbit Network}, M. Lipinski\\\url{http://cds.cern.ch/record/2261452}
%     \item \textbf{Trigger and RF Distribution using White Rabbit}, T. Wlostowski et al\\\url{http://accelconf.web.cern.ch/AccelConf/ICALEPCS2015/papers/wec3o01.pdf}
%     \item \textbf{White Rabbit Trigger Distribution:}\url{https://www.ohwr.org/project/wrtd/wikis/home}
% %     \url{https://indico.cern.ch/event/815290/#1-trigger-distribution-over-wh}
%   \end{enumerate}
  \begin{columns}[c]
    \column{.01\textwidth}
    \column{1.15\textwidth}
$[1]$ \textbf{White Rabbit Project:} \url{www.ohwr.org/project/white-rabbit/wikis}\\
$[2]$ \textbf{Methods to Increase Reliability and Ensure Determinism in a WR Network}, M. Lipinski, \url{cds.cern.ch/record/2261452}\\
$[3]$ \textbf{Companies selling WR:} \url{www.ohwr.org/project/white-rabbit/wrcompanies}\\
$[4]$ \textbf{Users of WR:} \url{www.ohwr.org/project/white-rabbit/WRUsers}\\
$[5]$ \textbf{White Rabbit Applications and Enhancements}, M.Lipinski et al., ISPCS2018, \url{www.ohwr.org/project/white-rabbit/uploads/7f9e67258850d5c036629a509bf2e124/ISPCS2018-WRApplicatoinsAndEnhancements.pdf}\\
$[6]$ \textbf{White Rabbit Newsletter, September 2018: } \url{www.ohwr.org/project/white-rabbit/wikis/newsletter-2018-09}\\
$[7]$ \textbf{Temperature Effect and Correction Method of White Rabbit Timing Link}; H. Li et al., \url{arxiv.org/abs/1406.4223}\\
$[8]$ \textbf{DWDM Stabilized Optics for White Rabbit}, P. Boven, \url{ieeexplore.ieee.org/document/8409035}\\
$[9]$ \textbf{WR Calibration}, version 1.1, G.Daniluk, \url{www.cern.ch/white-rabbit/documents/WR_Calibration-v1.1-20151109.pdf}\\
$[10]$ \textbf{White Rabbit Switch:} \url{www.ohwr.org/project/white-rabbit/wikis/Switch}\\
$[11]$ \textbf{White Rabbit Node:} \url{www.ohwr.org/project/white-rabbit/wikis/Node}\\
$[12]$ \textbf{White Rabbit PTP Core:} \url{www.ohwr.org/project/wr-cores/wikis/Wrpc-core}\\
$[13]$ \textbf{White Rabbit: a PTP application for robust sub-nanosecond synchronization}, M. Lipiński et el, ISPCS2011\\
~~~~~~~    \url{www.ohwr.org/project/white-rabbit/uploads/cfc34350adcbf5156f968fac0b9301b5/ISPCS2011_WR.pdf}\\
$[14]$ \textbf{White Rabbit Clock Synchronization: Ultimate Limits on Close-In Phase Noise and Short-Term Stability Due to FPGA Implementation}, M.Rizzi et el, UFFC-T, 2018\\
~~~~~~~    \url{www.ohwr.org/project/white-rabbit/uploads/253cbfc17d2b43cd445b68348aee0374/Submitted_IEEE.pdf}\\
$[15]$ \textbf{White Rabbit Clock Characteristics}, M. Rizzi et el., ISPCS2016,  \url{www.ohwr.org/project/white-rabbit/uploads/2fa1a438446fc6c85b4540faecf1017a/ISPCS2016-WRClockCharacteristics.pdf}\\
$[16]$ \textbf{WRS Low Jitter Daughterboard:} \url{www.ohwr.org/projects/wrs-low-jitter}\\
$[17]$ \textbf{White Rabbit standardization:} 
    \url{www.ohwr.org/projects/wr-std/wiki/} (\url{www.ohwr.org/projects/wr-std/wiki/wrin1588})
$[18]$ \textbf{WR Precision Time Protocol on Long-Distance Fiber Links}, E. F. Dierikx et al., \url{ieeexplore.ieee.org/document/7383303}\\
$[19]$ \textbf{White Rabbit Time Transfer on Medium and Long Fibre Hauls at INRIM}, G. Fantino et al., \\
~~~~~~~    \url{www.ion.org/publications/abstract.cfm?articleID=12598}\\
$[20]$ \textbf{Trigger and RF Distribution using White Rabbit}, T. Wlostowski et al., ICALEPCS2015, \\
~~~~~~~    \url{accelconf.web.cern.ch/AccelConf/ICALEPCS2015/papers/wec3o01.pdf}\\
$[21]$ \textbf{White Rabbit Trigger Distribution: }
\url{www.ohwr.org/project/wrtd/wikis/home}\\
~~~~~~~    \url{indico.cern.ch/event/815290/\#1-trigger-distribution-over-wh}\\

%     \column{.01\textwidth}
  \end{columns}
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\end{frame}
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\begin{frame}{Backup slides}
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      \begin{center}
      Backup slides
      \end{center}
\end{frame}


\begin{frame}{GM Switch with LJD: PM noise and Modfied ADEV}
  \begin{center}
    \includegraphics[width=.5\textwidth]{measurements/WRSlowJitter/pn.png}
    \includegraphics[width=.5\textwidth]{measurements/WRSlowJitter/mdev.png}
  \end{center}
\end{frame}

\begin{frame}{BC Switch with LJD: PM noise and Modfied ADEV}
  \begin{center}
    \includegraphics[width=.5\textwidth]{measurements/WRSlowJitter/slave_pn.png}
    \includegraphics[width=.5\textwidth]{measurements/WRSlowJitter/slave_mdev.png}
  \end{center}
\end{frame}
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\subsection{Standardization}
\begin{frame}{WR standardization in IEEE1588}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
\begin{columns}[c]
  \column{.8\textwidth}

  \begin{itemize}\small
    \item<1-> IEEE standards are revised periodically
    \item<2-> The IEEE1588 is revised by industry/academia
    \item<3-> Revision performed in 5 sub-committees \\\scriptsize(\url{https://ieee-sa.imeetcentral.com/1588public/})
    \item<4-> High Accuracy sub-committee dedicated to WR
    \begin{itemize}\scriptsize
        \item<6-> Generalization of WR methods
        \item<6-> Inclusion of the generalizations 
    \end{itemize} 
     \item<7-> Revised IEEE1588 expected in 2019
  \end{itemize} 
  \column{.4\textwidth}  
    \begin{center}
        \includegraphics<1-2>[width=0.8\textwidth]{p1588/p1588-1.jpg}
        \includegraphics<3>[width=0.8\textwidth]{p1588/p1588-2.jpg}
        \includegraphics<4>[width=0.8\textwidth]{p1588/p1588-3.jpg}
        \includegraphics<5->[width=0.8\textwidth]{p1588/p1588-4.jpg}
    \end{center}
\end{columns}
\end{frame}
\begin{frame}{WR standardization in IEEE1588}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 \begin{center}
  \includegraphics<1>[width=1.0\textwidth]{p1588/HAin1588-0.jpg}
  \includegraphics<2>[width=1.0\textwidth]{p1588/HAin1588-1.jpg}
  \includegraphics<3>[width=1.0\textwidth]{p1588/HAin1588-2.jpg}
  \includegraphics<4>[width=1.0\textwidth]{p1588/HAin1588-3.jpg}
  \includegraphics<5>[width=1.0\textwidth]{p1588/HAin1588-4.jpg}
  \includegraphics<6>[width=1.0\textwidth]{p1588/HAin1588-5.jpg}
 \end{center}
 \begin{center}
 \scriptsize
 \textbf{White Rabbit integration into IEEE1588-20XX as High Accuracy [17]:} \url{https://www.ohwr.org/projects/wr-std/wiki/wrin1588}
 \end{center}
 \end{frame}
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% 
% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% \subsection{}
% \begin{frame}{Performance Enhancements}
% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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%  \begin{itemize}\scriptsize
%    \item The short-term performance of WR
%          time-transfer directly depends on two design choices of the
%          WRS: the use of an FPGA-based phase detector and the use
%          of FPGA-based Gigabit transceivers.
%    \item Other sources of
%           uncertainty are the electro-optics and optics components.
%    \item The WRS has a complex clock generation and distribution
%           scheme that consists of 20 digital phase detectors, two LOs,
%          and five PLLs. A simplified diagram of the WR schema is
%          depicted in Fig. 4 and described in this section.
%    \item The results show that the noise of the DDMTD comprises
%          flicker PM noise and white PM noise. The flicker noise is
%          dominant below 10 Hz and it is typically due to transistor
%          noise related to the process technology [26]. The white noise
%          limits the phase noise to -108 dBc/Hz and it can be traced to
%          thermal noise, DFF meta-stability window and/or to phase
%          noise folding due to aliasing (as DDMTD is a sampled
%          system). The effect of the DMTD clock signal phase noise on
%          the results is shown for ∆t=16 ns in Fig. 8 (red line). The
%          effect of the DMTD clock phase noise is negligible
%    \item Fig. 9 shows the Modified Allan Deviation (MDEV)
%          calculated from the phase-tags. The limiting factor of the
%          DDMTD is the flicker PM noise, which is limiting the
%          MDEV at τ =1 s to 4E-13. In order to determine the source
%          of the measured phase noise, the experiment in the following
%          subsection was performed.
%   \item  The additive phase noise and stability limits measured in
%           Section V.D show a mix of white PM noise and flicker PM
%           noise. Notably, the phase noise above the Main PLL
%           bandwidth is filtered by WR PLL. The phase noise within the
%           Main PLL bandwidth is additively propagated by WR PLL.
%           The most limiting factor introduced by DDMTD is the
%           flicker PM noise, limiting the MDEV at τ =1 s to 4E-13. In
%           particular, the flicker PM noise is still dominant at τ =100 s,
%           as shown in Fig. 9. Last, the main contributors to flicker PM
%           noise are the IOBUFDS LVDS input clocks buffer and clock
%           routing.
%    \item The stability at τ =1s, although still dominated by
%           flicker PM noise, is better on Kintex-7 (28 nm) and
%           Kintex UltraScale (20 nm) than in Virtex-6 (40 nm) in the
%           WRS. Probably, the transistors size of IOBUFDS and clock
%           routing circuitry are scaled down less than the process
%           technology.
%   \item The additive phase noise introduced by the transmission
%         circuitry and CDR circuitry of GTX is as significant as the
%         additive phase noise introduced by DDMTD. Notably, the L1
%         RX clock noise exhibits a flicker PM noise having a
%         magnitude comparable to that of DDMTD (-100 dBc at 1 Hz
%         and stability of 4E-13 at τ=1 s). As a result, the noise
%         contributions that affect the short-term stability of the WR
%         time-transfer are equally shared between DMDTD and GTX,
%         which is confirmed by the experiment in VI.B.
%   \item The current
%         implementation of the WRS suffers from some additional
%         issues related to non-optimal design choices. These issues
%         result in a jitter which is one order of magnitude worse than
%         the fundamental limits explored in this article. The main
%         culprits are the use of a noisy internal MMCM PLL (shown
%         in Fig. 4) in the Virtex-6 in Grandmaster mode, and
%         instabilities in the Main LO induced by cooling airflow in the
%         WRS enclosure (box). The former issue is due to the phase
%         noise of the clock synthesized by MMCM PLL, the clock
%         signal has high phase noise at a frequency offset around
%         1 MHz [19]. Due to the discrete-time nature of DDMTD and
%         of WR PLL, the phase noise is folding back in baseband. The
%         latter issue was partially solved in [19] with an increased
%         control loop bandwidth (from 30 Hz to 200 Hz) of the Main
%         LO.
%   \item The phase detector introduces a limitation in short-term
%         stability equal to MDEV 4E-13 at τ =1 s (ENBW 50 Hz),
%         with a flicker PM behavior from τ =1 s to τ =100 s and more.
%         The origin of flicker PM is due to the LVDS input clock
%         buffer of the currently used FPGA and its related internal
%         clock distribution. Similar results are observed for newer
%         FPGAs, where a (slightly reduced) flicker PM is still present.
%         Notably, the FPGA-implemented Gigabit Transceiver
%         has a noise contribution, in terms of short-term stability,
%         almost equal to the contribution of the phase detector.
%         The experimental proof of the reachability of t
%  \end{itemize}


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