Dab64x shared vme
On the board Dab64x (BI) the VME bus is shared between a Stratix FPGA and a MAX3000 CPLD. Moreover, the 8 LSB address lines are used by both the devices to access a local Flash memory. For the FPGA internal IP, the VME core shall expose a signal telling a VME access is on-going and preventing any access to the flash. The solution is to expose the "card_sel" signal from the vme_bus block. The upper block will be custom for the board as some additional buffers need to be driven, so the signal can be left open in the upper in this repository.