Dynamic Function Sizing mis-implemented
The DFS bit in position 2 of the ADEM is meant for functions that do not have a fixed size (mask bits in ADEM). When DFS bit is enabled, then the master can use the DFSR bit in the respective ADER to dynamically load a new bit mask using the C bits of the ADER. After this is done, the master should restore the original contents of the ADER, in order to allow address matching. This is explained in Tables 10-4 and 10-8 of the ANSI/VITA 1.1-1997 standard.
Our current implementation does something completely wrong: it interprets the DFS bit as a flag to enable the checking of the used AM against the the AM declared in the ADER. This is turn leads to another bug, described in issue #1407.
For now, this is a low priority bug, since the DFS bit is hard-coded to zero and there is no possibility for the user to enable DFS mode (see also #943). However, once the CR space (see also issues #767 and #791), this bug will have to be fixed.