1. 11 Oct, 2017 1 commit
  2. 09 Oct, 2017 2 commits
  3. 29 Sep, 2017 1 commit
  4. 22 Sep, 2017 1 commit
  5. 26 Aug, 2017 1 commit
  6. 17 Jan, 2017 1 commit
  7. 13 Jan, 2017 1 commit
    • Tom Levens's avatar
      Modify reset · a293bef9
      Tom Levens authored
      Create a port (rst_n_o) on the top level component which is the
      combination of the HW resets (rst_n_i and VME_RST_n_i) and the SW reset
      bit coming from the CR/CSR.
      Signed-off-by: Tom Levens's avatarTom Levens <tom.levens@cern.ch>
      a293bef9
  8. 12 Jan, 2017 1 commit
    • Tom Levens's avatar
      Clean up CR/CSR space · 62b13b5e
      Tom Levens authored
      The CR/CSR space has been cleaned up and reworked. All decoding of the
      addresses has been moved from VME_bus to VME_CR_CSR_Space to make the
      code a bit more structured..
      
      The option to have a user CR and CSR areas has been added. These are
      external such that they can be implemented by the user.
      
      The custom CSR registers (IRQ vector/level ...) have been moved to
      VME_User_CSR.vhd. By default (in the xvme64x_core wrapper) this area is
      mapped to 0x7FF33..7FF5F (in the reserved area) in order to maintain
      compatibility with the previous version of the core. However, it can be
      moved using generics to a non-reserved area for new applications. This
      fixes Bug #1353.
      Signed-off-by: Tom Levens's avatarTom Levens <tom.levens@cern.ch>
      62b13b5e