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VME64x core
Commit ab6edbb9 authored by Tristan Gingold's avatar Tristan Gingold
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vme_funct_match: use standard way to write processes.

parent 1d0d3d91
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Showing with 8 additions and 6 deletions
doc/review-2017-11-13/GD-vme64x-core-review.txt
View file @ ab6edbb9
...@@ -96,7 +96,7 @@ ...@@ -96,7 +96,7 @@
Instead of clearing the registers at every risinge_edge, and having null in Instead of clearing the registers at every risinge_edge, and having null in
rst_n_i='0', please clear the registers when rst_n_i ='0' and add another rst_n_i='0', please clear the registers when rst_n_i ='0' and add another
"else" if you want to clear them every time decode_start_i='0'. "else" if you want to clear them every time decode_start_i='0'.
OK. Done.
- line 133: - line 133:
What's this construction??: What's this construction??:
mask(c_ADEM_M) := g_ADEM(s_function_sel)(c_ADEM_M); mask(c_ADEM_M) := g_ADEM(s_function_sel)(c_ADEM_M);
......
hdl/rtl/vme_funct_match.vhd
View file @ ab6edbb9
...@@ -94,12 +94,10 @@ begin ...@@ -94,12 +94,10 @@ begin
process (clk_i) process (clk_i)
begin begin
if rising_edge(clk_i) then if rising_edge(clk_i) then
if rst_n_i = '0' then
s_decode_start_1 <= '0';
s_function_sel <= 0; s_function_sel <= 0;
s_function_sel_valid <= '0'; s_function_sel_valid <= '0';
s_decode_start_1 <= '0';
if rst_n_i = '0' then
null;
elsif decode_start_i = '1' then elsif decode_start_i = '1' then
s_decode_start_1 <= '1'; s_decode_start_1 <= '1';
for i in 0 to 7 loop for i in 0 to 7 loop
...@@ -109,6 +107,10 @@ begin ...@@ -109,6 +107,10 @@ begin
exit; exit;
end if; end if;
end loop; end loop;
else
s_decode_start_1 <= '0';
s_function_sel <= 0;
s_function_sel_valid <= '0';
end if; end if;
end if; end if;
end process; end process;
......
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