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VME64x core
Commits
8aaa3368
Commit
8aaa3368
authored
Nov 27, 2017
by
Tristan Gingold
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Plain Diff
Reduce number of warnings by reducing the length of ader registers.
parent
07c2a3ef
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4 changed files
with
41 additions
and
20 deletions
+41
-20
vme64x_pkg.vhd
hdl/rtl/vme64x_pkg.vhd
+5
-4
vme_cr_csr_space.vhd
hdl/rtl/vme_cr_csr_space.vhd
+12
-9
vme_funct_match.vhd
hdl/rtl/vme_funct_match.vhd
+6
-6
xvme64x_core.vhd
hdl/rtl/xvme64x_core.vhd
+18
-1
No files found.
hdl/rtl/vme64x_pkg.vhd
View file @
8aaa3368
...
...
@@ -116,14 +116,15 @@ package vme64x_pkg is
------------------------------------------------------------------------------
-- CR/CSR parameter arrays
subtype
t_vme_func_index
is
natural
range
0
to
7
;
type
t_adem_array
is
array
(
integer
range
<>
)
of
std_logic_vector
(
31
downto
0
);
array
(
t_vme_func_index
range
<>
)
of
std_logic_vector
(
31
downto
0
);
type
t_ader_array
is
array
(
integer
range
<>
)
of
std_logic_vector
(
31
downto
0
);
array
(
t_vme_func_index
range
<>
)
of
std_logic_vector
(
31
downto
0
);
type
t_amcap_array
is
array
(
integer
range
<>
)
of
std_logic_vector
(
63
downto
0
);
array
(
t_vme_func_index
range
<>
)
of
std_logic_vector
(
63
downto
0
);
type
t_dawpr_array
is
array
(
integer
range
<>
)
of
std_logic_vector
(
7
downto
0
);
array
(
t_vme_func_index
range
<>
)
of
std_logic_vector
(
7
downto
0
);
type
t_vme64x_in
is
record
as_n
:
std_logic
;
...
...
hdl/rtl/vme_cr_csr_space.vhd
View file @
8aaa3368
...
...
@@ -149,7 +149,7 @@ entity vme_cr_csr_space is
user_cr_addr_o
:
out
std_logic_vector
(
18
downto
2
);
user_cr_data_i
:
in
std_logic_vector
(
7
downto
0
);
ader_o
:
out
t_ader_array
(
0
to
7
)
ader_o
:
out
t_ader_array
);
end
vme_cr_csr_space
;
...
...
@@ -161,7 +161,10 @@ architecture rtl of vme_cr_csr_space is
signal
s_reg_bit_reg
:
std_logic_vector
(
7
downto
0
);
signal
s_reg_cram_owner
:
std_logic_vector
(
7
downto
0
);
signal
s_reg_usr_bit_reg
:
std_logic_vector
(
7
downto
0
);
signal
s_reg_ader
:
t_ader_array
(
0
to
7
);
-- It is expected to have unconnected bits in this register, since they
-- are and'ed with ADEM bits (so some are always 0).
signal
s_reg_ader
:
t_ader_array
(
ader_o
'range
);
-- CR/CSR
signal
s_cr_access
:
std_logic
;
...
...
@@ -325,12 +328,12 @@ begin
process
(
clk_i
)
-- Write to ADER bytes, if implemented. Take advantage of VITAL-1-1 Rule
-- 10.19
procedure
Set_ADER
(
I
dx
:
natural
range
0
to
7
)
is
procedure
Set_ADER
(
i
dx
:
natural
range
0
to
7
)
is
variable
v_byte
:
integer
;
begin
if
g_ADEM
(
Idx
)
/=
x"0000_0000"
then
if
idx
<=
ader_o
'high
then
v_byte
:
=
3
-
to_integer
(
s_addr
(
3
downto
2
));
s_reg_ader
(
I
dx
)(
8
*
v_byte
+
7
downto
8
*
v_byte
)
<=
data_i
;
s_reg_ader
(
i
dx
)(
8
*
v_byte
+
7
downto
8
*
v_byte
)
<=
data_i
;
end
if
;
end
Set_ADER
;
...
...
@@ -442,15 +445,15 @@ begin
-- Read
process
(
clk_i
)
procedure
Get_ADER
(
I
dx
:
natural
range
0
to
7
)
procedure
Get_ADER
(
i
dx
:
natural
range
0
to
7
)
is
variable
v_byte
:
integer
;
variable
ader
:
std_logic_vector
(
31
downto
0
);
begin
if
g_ADEM
(
Idx
)
/=
x"0000_0000"
then
if
idx
<=
ader_o
'high
then
v_byte
:
=
3
-
to_integer
(
s_addr
(
3
downto
2
));
ader
:
=
s_reg_ader
(
I
dx
)
and
((
g_ADEM
(
I
dx
)
and
c_ADEM_MASK
)
or
c_ADER_MASK
);
ader
:
=
s_reg_ader
(
i
dx
)
and
((
g_ADEM
(
i
dx
)
and
c_ADEM_MASK
)
or
c_ADER_MASK
);
s_csr_data
<=
ader
(
8
*
v_byte
+
7
downto
8
*
v_byte
);
end
if
;
end
Get_ADER
;
...
...
hdl/rtl/vme_funct_match.vhd
View file @
8aaa3368
...
...
@@ -53,7 +53,7 @@ entity vme_funct_match is
decode_start_i
:
in
std_logic
;
am_i
:
in
std_logic_vector
(
5
downto
0
);
ader_i
:
in
t_ader_array
(
0
to
7
)
;
ader_i
:
in
t_ader_array
;
-- Set when a function is selected.
decode_sel_o
:
out
std_logic
;
...
...
@@ -64,18 +64,18 @@ end vme_funct_match;
architecture
rtl
of
vme_funct_match
is
-- Function index and ADEM from priority encoder
signal
s_function_sel
:
natural
range
0
to
7
;
signal
s_function_sel
:
natural
range
ader_i
'range
;
signal
s_function_sel_valid
:
std_logic
;
signal
s_decode_start_1
:
std_logic
;
-- Selected function
signal
s_function
:
std_logic_vector
(
7
downto
0
);
signal
s_ader_am_valid
:
std_logic_vector
(
7
downto
0
);
signal
s_function
:
std_logic_vector
(
ader_i
'range
);
signal
s_ader_am_valid
:
std_logic_vector
(
ader_i
'range
);
begin
------------------------------------------------------------------------------
-- Address and AM comparators
------------------------------------------------------------------------------
gen_match_loop
:
for
i
in
0
to
7
generate
gen_match_loop
:
for
i
in
ader_i
'range
generate
-- True in case of match
s_function
(
i
)
<=
'1'
when
(((
addr_i
(
t_ADEM_M
)
and
g_ADEM
(
i
)(
t_ADEM_M
))
...
...
@@ -100,7 +100,7 @@ begin
s_function_sel_valid
<=
'0'
;
else
s_decode_start_1
<=
'1'
;
for
i
in
0
to
7
loop
for
i
in
ader_i
'range
loop
if
s_function
(
i
)
=
'1'
then
s_function_sel
<=
i
;
s_function_sel_valid
<=
s_ader_am_valid
(
i
);
...
...
hdl/rtl/xvme64x_core.vhd
View file @
8aaa3368
...
...
@@ -195,6 +195,23 @@ end xvme64x_core;
architecture
rtl
of
xvme64x_core
is
-- Compute the index of the last function decoder used. Assume sequential
-- use of decoders (ie decoders 0 to N - 1 are used, and decoders N to 7
-- are not used; holes are supported but not efficiently).
function
compute_last_ader
(
decoder
:
t_vme64x_decoder_arr
)
return
t_vme_func_index
is
begin
for
i
in
decoder
'reverse_range
loop
if
decoder
(
i
)
.
adem
/=
x"0000_0000"
then
return
i
;
end
if
;
end
loop
;
assert
false
report
"no ADEM defined"
severity
failure
;
return
0
;
end
compute_last_ader
;
constant
c_last_ader
:
natural
:
=
compute_last_ader
(
g_DECODER
);
signal
s_reset_n
:
std_logic
;
signal
s_VME_IRQ_n_o
:
std_logic_vector
(
7
downto
1
);
...
...
@@ -206,7 +223,7 @@ architecture rtl of xvme64x_core is
signal
s_cr_csr_data_o
:
std_logic_vector
(
7
downto
0
);
signal
s_cr_csr_data_i
:
std_logic_vector
(
7
downto
0
);
signal
s_cr_csr_we
:
std_logic
;
signal
s_ader
:
t_ader_array
(
0
to
7
);
signal
s_ader
:
t_ader_array
(
0
to
c_last_ader
);
signal
s_module_reset
:
std_logic
;
signal
s_module_enable
:
std_logic
;
signal
s_bar
:
std_logic_vector
(
4
downto
0
);
...
...
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