Commit 78cac871 authored by Dimitris Lampridis's avatar Dimitris Lampridis

Invert RTY assertion logic to make simulators happier

parent e0f5eaad
......@@ -513,5 +513,5 @@ begin
user_csr_data_o <= s_user_csr_data_o;
user_csr_we_o <= s_user_csr_we;
assert wb_i.rty = '0' report "rty not supported";
assert wb_i.rty /= '1' report "rty not supported";
end rtl;
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