Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
V
VME64x core
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
VME64x core
Commits
710dbc16
Commit
710dbc16
authored
Jun 04, 2020
by
Tristan Gingold
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
g_VME_2e generic is false by default. Adjust component and testbench.
parent
b86ede3d
Show whitespace changes
Inline
Side-by-side
Showing
4 changed files
with
14 additions
and
10 deletions
+14
-10
vme64x_core.vhd
hdl/rtl/vme64x_core.vhd
+3
-2
vme64x_pkg.vhd
hdl/rtl/vme64x_pkg.vhd
+1
-0
xvme64x_core.vhd
hdl/rtl/xvme64x_core.vhd
+2
-1
top_tb.vhd
hdl/testbench/simple_tb/top_tb.vhd
+8
-7
No files found.
hdl/rtl/vme64x_core.vhd
View file @
710dbc16
...
...
@@ -16,6 +16,7 @@ entity vme64x_core is
g_ENABLE_CR_CSR
:
boolean
:
=
true
;
g_USER_CSR_EXT
:
boolean
:
=
false
;
g_VME32
:
boolean
:
=
true
;
g_VME_2e
:
boolean
:
=
False
;
g_WB_GRANULARITY
:
t_wishbone_address_granularity
;
g_MANUFACTURER_ID
:
std_logic_vector
(
23
downto
0
);
g_BOARD_ID
:
std_logic_vector
(
31
downto
0
);
...
...
@@ -117,6 +118,7 @@ begin
g_VME32
=>
g_VME32
,
g_WB_GRANULARITY
=>
g_WB_GRANULARITY
,
g_WB_MODE
=>
CLASSIC
,
g_VME_2e
=>
g_VME_2e
,
g_MANUFACTURER_ID
=>
g_MANUFACTURER_ID
,
g_BOARD_ID
=>
g_BOARD_ID
,
g_REVISION_ID
=>
g_REVISION_ID
,
...
...
@@ -205,4 +207,3 @@ begin
user_cr_addr_o
=>
user_cr_addr_o
,
user_cr_data_i
=>
user_cr_data_i
);
end
unwrap
;
hdl/rtl/vme64x_pkg.vhd
View file @
710dbc16
...
...
@@ -199,6 +199,7 @@ package vme64x_pkg is
g_VME32
:
boolean
:
=
True
;
g_VME_2e
:
boolean
:
=
True
;
g_WB_GRANULARITY
:
t_wishbone_address_granularity
;
g_WB_MODE
:
t_wishbone_interface_mode
:
=
CLASSIC
;
g_MANUFACTURER_ID
:
std_logic_vector
(
23
downto
0
);
g_BOARD_ID
:
std_logic_vector
(
31
downto
0
);
...
...
hdl/rtl/xvme64x_core.vhd
View file @
710dbc16
...
...
@@ -64,7 +64,8 @@ entity xvme64x_core is
g_VME32
:
boolean
:
=
True
;
-- If True, supports 2eSST.
g_VME_2e
:
boolean
:
=
True
;
-- Do not forget to assign g_DECODER if set to True.
g_VME_2e
:
boolean
:
=
False
;
-- Address granularity on the WB bus. Value can be:
-- WORD: VME address bits 31:2 are translated to WB address bits 29:0,
...
...
hdl/testbench/simple_tb/top_tb.vhd
View file @
710dbc16
...
...
@@ -270,6 +270,7 @@ begin
g_DECODE_AM
=>
(
g_SCENARIO
/=
9
),
g_WB_GRANULARITY
=>
WORD
,
g_USER_CSR_EXT
=>
false
,
g_VME_2e
=>
True
,
g_MANUFACTURER_ID
=>
c_CERN_ID
,
g_BOARD_ID
=>
c_SVEC_ID
,
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment